| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-12-19 | target/i386: Reset TSCs of parked vCPUs too on VM reset | Maciej S. Szmigiero | 1 | -0/+15 |
| 2024-12-19 | include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LIST | Richard Henderson | 9 | -10/+0 |
| 2024-12-19 | target/riscv: Do not abuse DEFINE_PROP_END_OF_LIST | Richard Henderson | 1 | -6/+6 |
| 2024-12-19 | target/s390x: Use s390x_cpu_properties for system mode only | Richard Henderson | 1 | -3/+3 |
| 2024-12-19 | target/ppc: Remove empty property list | Richard Henderson | 1 | -6/+0 |
| 2024-12-15 | target/sparc: Constify all Property and PropertyInfo | Richard Henderson | 1 | -2/+2 |
| 2024-12-15 | target/s390x: Constify all Property | Richard Henderson | 1 | -1/+1 |
| 2024-12-15 | target/riscv: Constify all Property | Richard Henderson | 1 | -1/+1 |
| 2024-12-15 | target/mips: Constify all Property | Richard Henderson | 1 | -1/+1 |
| 2024-12-15 | target/microblaze: Constify all Property | Richard Henderson | 1 | -1/+1 |
| 2024-12-15 | target/i386: Constify all Property | Richard Henderson | 1 | -2/+2 |
| 2024-12-15 | target/hexagon: Constify all Property | Richard Henderson | 1 | -1/+1 |
| 2024-12-15 | target/avr: Constify all Property | Richard Henderson | 1 | -1/+1 |
| 2024-12-15 | target/arm: Constify all Property | Richard Henderson | 3 | -17/+17 |
| 2024-12-14 | Merge tag 'pull-target-arm-20241213' of https://git.linaro.org/people/pmaydel... | Stefan Hajnoczi | 17 | -5414/+3999 |
| 2024-12-14 | Merge tag 'pull-hex-20241212' of https://github.com/quic/qemu into staging | Stefan Hajnoczi | 24 | -294/+147 |
| 2024-12-13 | target/arm: Simplify condition for tlbi_el2_cp_reginfo[] | Peter Maydell | 1 | -3/+1 |
| 2024-12-13 | target/arm: Move RME TLB insns to tlb-insns.c | Peter Maydell | 2 | -38/+45 |
| 2024-12-13 | target/arm: Move small helper functions to tlb-insns.c | Peter Maydell | 3 | -254/+220 |
| 2024-12-13 | target/arm: Move the TLBI OS insns to tlb-insns.c. | Peter Maydell | 2 | -80/+80 |
| 2024-12-13 | target/arm: Move TLBI range insns | Peter Maydell | 3 | -328/+333 |
| 2024-12-13 | target/arm: Move AArch64 EL3 TLBI insns | Peter Maydell | 3 | -52/+62 |
| 2024-12-13 | target/arm: Move the AArch64 EL2 TLBI insns | Peter Maydell | 3 | -55/+62 |
| 2024-12-13 | target/arm: Move AArch64 TLBI insns from v8_cp_reginfo[] | Peter Maydell | 3 | -171/+182 |
| 2024-12-13 | target/arm: Move TLBI insns for AArch32 EL2 to tlbi_insn_helper.c | Peter Maydell | 4 | -77/+92 |
| 2024-12-13 | target/arm: Move some TLBI insns to their own source file | Peter Maydell | 6 | -220/+280 |
| 2024-12-13 | target/arm: Use float_round_to_odd in helper_fcvtx_f64_to_f32 | Richard Henderson | 1 | -15/+5 |
| 2024-12-13 | target/arm: Convert FCVTL to decodetree | Richard Henderson | 2 | -186/+18 |
| 2024-12-13 | target/arm: Convert URECPE and URSQRTE to decodetree | Richard Henderson | 2 | -134/+8 |
| 2024-12-13 | target/arm: Introduce gen_gvec_urecpe, gen_gvec_ursqrte | Richard Henderson | 5 | -2/+48 |
| 2024-12-13 | target/arm: Convert FRECPE, FRECPX, FRSQRTE to decodetree | Richard Henderson | 2 | -291/+53 |
| 2024-12-13 | target/arm: Convert handle_2misc_fcmp_zero to decodetree | Richard Henderson | 4 | -150/+138 |
| 2024-12-13 | target/arm: Convert FCVT* (vector, integer) to decodetree | Richard Henderson | 6 | -188/+102 |
| 2024-12-13 | target/arm: Convert FCVTZ[SU] (vector, fixed-point) to decodetree | Richard Henderson | 5 | -146/+32 |
| 2024-12-13 | target/arm: Convert [US]CVTF (vector) to decodetree | Richard Henderson | 4 | -168/+67 |
| 2024-12-13 | target/arm: Rename helper_gvec_vcvt_[hf][su] with _rz | Richard Henderson | 3 | -12/+12 |
| 2024-12-13 | target/arm: Convert [US]CVTF (vector, fixed-point) scalar to decodetree | Richard Henderson | 2 | -47/+8 |
| 2024-12-13 | target/arm: Convert [US]CVTF (vector, integer) scalar to decodetree | Richard Henderson | 2 | -10/+31 |
| 2024-12-13 | target/arm: Convert FCVT* (vector, fixed-point) scalar to decodetree | Richard Henderson | 2 | -3/+20 |
| 2024-12-13 | target/arm: Convert FCVT* (vector, integer) scalar to decodetree | Richard Henderson | 2 | -77/+86 |
| 2024-12-13 | target/arm: Convert FRINT* (vector) to decodetree | Richard Henderson | 2 | -111/+85 |
| 2024-12-13 | target/arm: Convert FSQRT (vector) to decodetree | Richard Henderson | 2 | -19/+53 |
| 2024-12-13 | target/arm: Convert FABS, FNEG (vector) to decodetree | Richard Henderson | 2 | -30/+31 |
| 2024-12-13 | target/arm: Implement gen_gvec_fabs, gen_gvec_fneg | Richard Henderson | 3 | -18/+22 |
| 2024-12-13 | target/arm: Convert SHLL to decodetree | Richard Henderson | 2 | -37/+40 |
| 2024-12-13 | target/arm: Convert FCVTXN to decodetree | Richard Henderson | 2 | -81/+24 |
| 2024-12-13 | target/arm: Convert FCVTN, BFCVTN to decodetree | Richard Henderson | 2 | -42/+52 |
| 2024-12-13 | target/arm: Convert XTN, SQXTUN, SQXTN, UQXTN to decodetree | Richard Henderson | 2 | -60/+102 |
| 2024-12-13 | target/arm: Introduce clear_vec | Richard Henderson | 1 | -9/+12 |
| 2024-12-13 | target/arm: Remove helper_neon_{add,sub}l_u{16,32} | Richard Henderson | 3 | -51/+11 |
