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2018-11-13target/arm/cpu: Give Cortex-A15 and -A7 the EL2 featurePeter Maydell1-0/+2
2018-11-13target/arm: Hyp mode R14 is shared with User and SystemPeter Maydell4-18/+35
2018-11-13target/arm: Correctly implement handling of HCR_EL2.{VI, VF}Peter Maydell3-3/+83
2018-11-13target/arm: Track the state of our irq lines from the GIC explicitlyPeter Maydell3-0/+71
2018-11-13Revert "target/arm: Implement HCR.VI and VF"Peter Maydell1-43/+4
2018-11-13arm: fix aa64_generate_debug_exceptions to work with EL2Alex Bennée1-15/+24
2018-11-13arm: use symbolic MDCR_TDE in arm_debug_target_elAlex Bennée1-1/+1
2018-11-13target/arm64: kvm debug set target_el when passing exception to guestAlex Bennée1-0/+1
2018-11-13target/arm64: hold BQL when calling do_interrupt()Alex Bennée1-0/+2
2018-11-13target/arm64: properly handle DBGVR RESS bitsAlex Bennée1-2/+15
2018-11-13target/arm: Fix typo in tlbi_aa64_vmalle1_writeRichard Henderson1-1/+1
2018-11-13target/arm: Remove antique TODO commentPeter Maydell1-1/+0
2018-11-13target/arm: Remove workaround for small SAU regionsPeter Maydell1-12/+0
2018-11-08Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20181108' into...Peter Maydell11-384/+767
2018-11-08Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell5-4/+34
2018-11-08ppc/spapr_caps: Add SPAPR_CAP_NESTED_KVM_HVSuraj Jitindar Singh2-0/+24
2018-11-08target/ppc: Add one reg id for ptcrSuraj Jitindar Singh1-5/+5
2018-11-08This patch fixes processing of rfi instructions in icount mode.Maria Klimushenkova1-0/+12
2018-11-08target/ppc: fix mtmsr instruction for icountPavel Dovgalyuk1-0/+12
2018-11-08target/ppc: Split out float_invalid_cvtRichard Henderson1-39/+28
2018-11-08target/ppc: Split out float_invalid_op_divRichard Henderson1-28/+24
2018-11-08target/ppc: Split out float_invalid_op_mulRichard Henderson1-23/+20
2018-11-08target/ppc: Split out float_invalid_op_addsubRichard Henderson1-34/+26
2018-11-08target/ppc: Introduce fp number classificationRichard Henderson1-43/+51
2018-11-08target/ppc: Remove float_check_statusRichard Henderson1-42/+35
2018-11-08target/ppc: Split up float_invalid_op_excpRichard Henderson1-163/+181
2018-11-08target/ppc: add external PID supportRoman Kapl8-45/+387
2018-11-06target/i386: Clear RF on SYSCALL instructionRudolf Marek1-2/+2
2018-11-06x86: hv_evmcs CPU flag supportVitaly Kuznetsov4-2/+32
2018-11-06target/arm: Fix ATS1Hx instructionsPeter Maydell1-2/+2
2018-11-06target/arm: Set S and PTW in 64-bit PAR formatPeter Maydell1-4/+6
2018-11-06target/arm: Remove can't-happen if() from handle_vec_simd_shli()Peter Maydell1-5/+3
2018-11-02target/arm: Conditionalize some asserts on aarch32 supportRichard Henderson2-2/+18
2018-11-02Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf1' in...Peter Maydell1-1/+1
2018-11-02Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-3.1-pull-request' ...Peter Maydell2-4/+3
2018-11-01Merge remote-tracking branch 'remotes/rth/tags/pull-dt-20181031' into stagingPeter Maydell3-375/+355
2018-11-01target/m68k: use EXCP_ILLEGAL instead of EXCP_UNSUPPORTEDLaurent Vivier2-4/+3
2018-10-31decodetree: Remove "insn" argument from trans_* expandersRichard Henderson3-375/+355
2018-10-30i386: Add PKU on Skylake-Server CPU modelTao Xu1-0/+4
2018-10-30i386: Add new model of Cascadelake-ServerTao Xu1-0/+54
2018-10-30x86: define a new MSR based feature word -- FEATURE_WORDS_ARCH_CAPABILITIESRobert Hoo3-1/+42
2018-10-30x86: Data structure changes to support MSR based featuresRobert Hoo1-55/+142
2018-10-30kvm: Add support to KVM_GET_MSR_FEATURE_INDEX_LIST and KVM_GET_MSRS system ioctlRobert Hoo1-0/+80
2018-10-30target/i386: Remove #ifdeffed-out icebp debugging hackPeter Maydell1-6/+0
2018-10-30i386: correct cpu_x86_cpuid(0xd)Sebastian Andrzej Siewior1-1/+1
2018-10-30target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64Dayeol Lee1-1/+1
2018-10-29target/mips: Amend MXU ASE overview noteAleksandar Markovic1-10/+74
2018-10-29target/mips: Move MXU_EN check one level higherAleksandar Markovic1-271/+238
2018-10-29target/mips: Add emulation of MXU instructions S32LDD and S32LDDRCraig Janeczek1-7/+47
2018-10-29target/mips: Add emulation of MXU instructions Q8MUL and Q8MULSUCraig Janeczek1-7/+94
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