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2019-03-05kvm: add kvm_arm_get_max_vm_ipa_sizeEric Auger2-0/+23
2019-03-05target/arm: Implement ARMv8.5-FRINTRichard Henderson5-5/+173
2019-03-05target/arm: Restructure handle_fp_1src_{single, double}Richard Henderson1-41/+49
2019-03-05target/arm: Implement ARMv8.5-CondMRichard Henderson3-1/+64
2019-03-05target/arm: Implement ARMv8.4-CondMRichard Henderson3-1/+104
2019-03-05target/arm: Rearrange disas_data_proc_regRichard Henderson1-41/+57
2019-03-05target/arm: Add set/clear_pstate_bits, share gen_ss_advanceRichard Henderson5-29/+34
2019-03-05target/arm: Split helper_msr_i_pstate into 3Richard Henderson6-56/+70
2019-03-05target/arm: Implement ARMv8.0-PredInvRichard Henderson4-1/+70
2019-03-05target/arm: Implement ARMv8.0-SBRichard Henderson5-0/+49
2019-03-05target/arm: Split out arm_sctlrRichard Henderson2-15/+17
2019-03-05target/arm: Fix PC test for LDM (exception return)Richard Henderson1-1/+1
2019-03-04s390x: Add floating-point extension facility to "qemu" cpu modelDavid Hildenbrand1-0/+5
2019-03-04s390x/tcg: Handle all rounding modes overwritten by BFP instructionsDavid Hildenbrand1-2/+11
2019-03-04s390x/tcg: Implement rounding mode and XxC for LOAD ROUNDEDDavid Hildenbrand4-15/+44
2019-03-04s390x/tcg: Implement XxC and checks for most FP instructionsDavid Hildenbrand2-126/+247
2019-03-04s390x/tcg: Prepare for IEEE-inexact-exception control (XxC)David Hildenbrand1-57/+57
2019-03-04s390x/tcg: Refactor saving/restoring the bfp rounding modeDavid Hildenbrand2-43/+71
2019-03-04s390x/tcg: Check for exceptions in SET BFP ROUNDING MODEDavid Hildenbrand4-35/+39
2019-03-04s390x/tcg: Handle SET FPC AND LOAD FPC 3-bit BFP rounding modesDavid Hildenbrand2-5/+19
2019-03-04s390x/tcg: Fix simulated-IEEE exceptionsDavid Hildenbrand1-0/+13
2019-03-04s390x/tcg: Refactor SET FPC AND SIGNAL handlingDavid Hildenbrand1-10/+12
2019-03-04s390x/tcg: Hide IEEE underflows in some scenariosDavid Hildenbrand1-0/+13
2019-03-04s390x/tcg: Fix parts of IEEE exception handlingDavid Hildenbrand1-6/+32
2019-03-04s390x/tcg: Factor out conversion of softfloat exceptionsDavid Hildenbrand2-12/+20
2019-03-04s390x/tcg: Fix rounding from float128 to uint64_t/uint32_tDavid Hildenbrand1-6/+2
2019-03-04s390x/tcg: Fix TEST DATA CLASS instructionsDavid Hildenbrand1-50/+35
2019-03-04s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARYDavid Hildenbrand5-0/+31
2019-03-04s390x/tcg: Implement LOAD LENGTHENED short HFP to long HFPDavid Hildenbrand2-0/+8
2019-03-04s390x/tcg: Factor out gen_addi_and_wrap_i64() from get_address()David Hildenbrand1-15/+26
2019-03-04s390x/tcg: Factor out vec_full_reg_offset()David Hildenbrand1-2/+7
2019-03-04s390x/tcg: Clarify terminology in vec_reg_offset()David Hildenbrand1-5/+6
2019-03-04s390x/tcg: Simplify disassembler operands initializationDavid Hildenbrand1-7/+1
2019-03-04s390x/tcg: RXE has an optional M3 fieldDavid Hildenbrand1-1/+1
2019-03-04s390x/tcg: Save vregs to extended mchk save areaDavid Hildenbrand2-3/+47
2019-03-04s390x: use a QEMU-style typedef + name for SIGP save area structDavid Hildenbrand1-4/+4
2019-03-04s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUSDavid Hildenbrand1-10/+21
2019-02-28Merge remote-tracking branch 'remotes/xtensa/tags/20190228-xtensa' into stagingPeter Maydell8-1745/+1855
2019-02-28Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190228-...Peter Maydell13-103/+519
2019-02-28Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-27-2019' ...Peter Maydell1-2/+41
2019-02-28target/xtensa: implement PREFCTL SRMax Filippov2-0/+17
2019-02-28target/xtensa: prioritize load/store in FLIX bundlesMax Filippov2-5/+36
2019-02-28target/xtensa: break circular register dependenciesMax Filippov1-4/+123
2019-02-28target/xtensa: reorganize access to boolean registersMax Filippov1-8/+42
2019-02-28target/xtensa: reorganize access to MAC16 registersMax Filippov1-94/+92
2019-02-28target/xtensa: reorganize register handling in translatorsMax Filippov3-344/+386
2019-02-28target/xtensa: only rotate window in the retw helperMax Filippov3-9/+10
2019-02-28target/xtensa: move WINDOW_BASE SR update to postprocessingMax Filippov4-20/+28
2019-02-28target/xtensa: add generic instruction post-processingMax Filippov2-8/+33
2019-02-28target/xtensa: sort FLIX instruction opcodesMax Filippov2-8/+221