riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-10-18	Merge tag 'pull-error-2024-10-18' of https://repo.or.cz/qemu/armbru into staging	Peter Maydell	1	-32/+27
2024-10-18	target/i386/cpu: Improve errors for out of bounds property values	Markus Armbruster	1	-11/+9
2024-10-18	target/i386/cpu: Avoid mixing signed and unsigned in property setters	Markus Armbruster	1	-24/+21
2024-10-18	Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging	Peter Maydell	10	-441/+526
2024-10-17	target/i386: Use only 16 and 32-bit operands for IN/OUT	Richard Henderson	1	-4/+4
2024-10-17	target/i386/tcg: Use DPL-level accesses for interrupts and call gates	Paolo Bonzini	1	-6/+11
2024-10-17	target/i386: assert that cc_op* and pc_save are preserved	Paolo Bonzini	1	-9/+3
2024-10-17	target/i386: list instructions still in translate.c	Paolo Bonzini	1	-0/+31
2024-10-17	target/i386: do not check PREFIX_LOCK in old-style decoder	Paolo Bonzini	1	-18/+8
2024-10-17	target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder	Paolo Bonzini	4	-129/+124
2024-10-17	target/i386: decode address before going back to translate.c	Paolo Bonzini	4	-118/+103
2024-10-17	target/i386: convert bit test instructions to new decoder	Paolo Bonzini	4	-158/+183
2024-10-17	Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into s...	Peter Maydell	1	-5/+1
2024-10-17	target/i386: Make sure SynIC state is really updated before KVM_RUN	Vitaly Kuznetsov	1	-0/+1
2024-10-17	target/i386: Exclude 'hv-syndbg' from 'hv-passthrough'	Vitaly Kuznetsov	1	-2/+5
2024-10-17	target/i386: Fix conditional CONFIG_SYNDBG enablement	Vitaly Kuznetsov	2	-4/+9
2024-10-17	target/i386: Add support save/load HWCR MSR	Gao Shiyuan	3	-0/+37
2024-10-17	target/i386: Add more features enumerated by CPUID.7.2.EDX	Chao Gao	1	-2/+2
2024-10-17	target/i386: Make invtsc migratable when user sets tsc-khz explicitly	Xiaoyao Li	1	-2/+9
2024-10-17	target/i386: Construct CPUID 2 as stateful iff times > 1	Xiaoyao Li	1	-2/+4
2024-10-17	target/i386: Enable fdp-excptn-only and zero-fcs-fds	Xiaoyao Li	2	-2/+6
2024-10-17	target/i386: Don't construct a all-zero entry for CPUID[0xD 0x3f]	Xiaoyao Li	1	-5/+6
2024-10-16	target/loongarch: Avoid bits shift exceeding width of bool type	Bibo Mao	1	-5/+1
2024-10-15	hw/mips: Have mips_cpu_create_with_clock() take an endianness argument	Philippe Mathieu-Daudé	2	-2/+7
2024-10-15	target/mips: Expose MIPSCPU::is_big_endian property	Philippe Mathieu-Daudé	2	-4/+11
2024-10-15	target/mips: Use tcg_constant_tl() instead of tcg_gen_movi_tl()	Philippe Mathieu-Daudé	2	-101/+59
2024-10-15	target/mips: Use gen_op_addr_addi() when possible	Philippe Mathieu-Daudé	5	-26/+12
2024-10-15	target/mips: Have gen_addiupc() expand $pc during translation	Philippe Mathieu-Daudé	1	-6/+4
2024-10-15	target/mips: Replace MO_TE by mo_endian()	Philippe Mathieu-Daudé	6	-103/+106
2024-10-15	target/mips: Introduce mo_endian() helper	Philippe Mathieu-Daudé	1	-0/+5
2024-10-15	target/mips: Remove unused MEMOP_IDX() macro	Philippe Mathieu-Daudé	1	-8/+0
2024-10-15	target/mips: Rename unused sysemu argument of OP_LD_ATOMIC()	Philippe Mathieu-Daudé	1	-1/+1
2024-10-15	target/mips: Explode MO_TExx -> MO_TE \| MO_xx	Philippe Mathieu-Daudé	5	-98/+100
2024-10-15	target/mips: Factor mo_endian_rev() out of MXU code	Philippe Mathieu-Daudé	2	-4/+9
2024-10-15	target/mips: Convert mips16e decr_and_load/store() macros to functions	Philippe Mathieu-Daudé	1	-48/+53
2024-10-15	target/mips: Replace MO_TE by mo_endian_env() in get_pte()	Philippe Mathieu-Daudé	1	-1/+1
2024-10-15	target/mips: Introduce mo_endian_env() helper	Philippe Mathieu-Daudé	1	-0/+5
2024-10-15	target/mips: Rename cpu_is_bigendian() -> disas_is_bigendian()	Philippe Mathieu-Daudé	3	-6/+6
2024-10-15	target/mips: Declare mips_env_is_bigendian() in 'internal.h'	Philippe Mathieu-Daudé	2	-10/+10
2024-10-15	target/ppc: Use tcg_constant_tl() instead of tcg_gen_movi_tl()	Philippe Mathieu-Daudé	1	-8/+5
2024-10-15	target/tricore: Use tcg_constant_tl() instead of tcg_gen_movi_tl()	Philippe Mathieu-Daudé	1	-2/+1
2024-10-15	target/tricore: Use explicit little-endian LD/ST API	Philippe Mathieu-Daudé	1	-1/+1
2024-10-15	target/loongarch: Use explicit little-endian LD/ST API	Philippe Mathieu-Daudé	1	-4/+4
2024-10-15	target/avr: Use explicit little-endian LD/ST API	Philippe Mathieu-Daudé	1	-2/+2
2024-10-15	target/hexagon: Use explicit little-endian LD/ST API	Philippe Mathieu-Daudé	1	-5/+5
2024-10-15	target/alpha: Use explicit little-endian LD/ST API	Philippe Mathieu-Daudé	1	-1/+1
2024-10-15	target/alpha: Replace ldtul_p() -> ldq_p()	Philippe Mathieu-Daudé	1	-1/+1
2024-10-15	target/hexagon: Replace ldtul_p() -> ldl_p()	Philippe Mathieu-Daudé	1	-5/+5
2024-10-13	target/arm: Fix alignment fault priority in get_phys_addr_lpae	Richard Henderson	1	-21/+30
2024-10-13	target/arm: Implement TCGCPUOps.tlb_fill_align	Richard Henderson	4	-34/+23