Age | Commit message (Expand) | Author | Files | Lines |
2022-04-21 | compiler.h: replace QEMU_NORETURN with G_NORETURN | Marc-André Lureau | 34 | -149/+160 |
2022-04-20 | Merge tag 'pull-tcg-20220420' of https://gitlab.com/rth7680/qemu into staging | Richard Henderson | 3 | -3/+0 |
2022-04-20 | Merge tag 'pull-log-20220420' of https://gitlab.com/rth7680/qemu into staging | Richard Henderson | 22 | -88/+99 |
2022-04-20 | Don't include sysemu/tcg.h if it is not necessary | Thomas Huth | 3 | -3/+0 |
2022-04-20 | target/nios2: Remove log_cpu_state from reset | Richard Henderson | 1 | -5/+0 |
2022-04-20 | exec/translator: Pass the locked filepointer to disas_log hook | Richard Henderson | 21 | -70/+90 |
2022-04-20 | *: Use fprintf between qemu_log_trylock/unlock | Richard Henderson | 1 | -6/+8 |
2022-04-20 | util/log: Rename qemu_log_lock to qemu_log_trylock | Richard Henderson | 1 | -1/+1 |
2022-04-20 | target/hexagon: Remove qemu_set_log in hexagon_translate_init | Richard Henderson | 1 | -6/+0 |
2022-04-20 | target/i386: fix byte swap issue with XMM register access | Alex Bennée | 1 | -2/+2 |
2022-04-13 | target/i386: Remove unused XMMReg, YMMReg types and CPUState fields | Peter Maydell | 1 | -18/+0 |
2022-04-13 | target/i386: do not access beyond the low 128 bits of SSE registers | Paolo Bonzini | 1 | -28/+47 |
2022-04-06 | hw: hyperv: Initial commit for Synthetic Debugging device | Jon Doron | 1 | -0/+6 |
2022-04-06 | hyperv: Add support to process syndbg commands | Jon Doron | 5 | -8/+135 |
2022-04-06 | hyperv: Add definitions for syndbg | Jon Doron | 1 | -0/+37 |
2022-04-06 | whpx: Added support for breakpoints and stepping | Ivan Shcherbakov | 4 | -14/+788 |
2022-04-06 | Remove qemu-common.h include from most units | Marc-André Lureau | 34 | -34/+0 |
2022-04-06 | Move CPU softfloat unions to cpu-float.h | Marc-André Lureau | 15 | -2/+15 |
2022-04-06 | include: move target page bits declaration to page-vary.h | Marc-André Lureau | 1 | -1/+1 |
2022-04-06 | Replace qemu_real_host_page variables with inlined functions | Marc-André Lureau | 4 | -14/+14 |
2022-04-06 | Replace TARGET_WORDS_BIGENDIAN | Marc-André Lureau | 11 | -22/+22 |
2022-04-06 | Replace config-time define HOST_WORDS_BIGENDIAN | Marc-André Lureau | 32 | -79/+79 |
2022-04-06 | Replace qemu_gettimeofday() with g_get_real_time() | Marc-André Lureau | 2 | -25/+20 |
2022-04-06 | qapi, target/i386/sev: Add cpu0-id to query-sev-capabilities | Dov Murik | 1 | -1/+41 |
2022-04-02 | Merge tag 'pull-request-2022-04-01' of https://gitlab.com/thuth/qemu into sta... | Peter Maydell | 1 | -4/+4 |
2022-04-01 | Merge tag 'pull-target-arm-20220401' of https://git.linaro.org/people/pmaydel... | Peter Maydell | 3 | -5/+22 |
2022-04-01 | Merge tag 'pull-riscv-to-apply-20220401' of github.com:alistair23/qemu into s... | Peter Maydell | 2 | -6/+13 |
2022-04-01 | target/arm: Don't use DISAS_NORETURN in STXP !HAVE_CMPXCHG128 codegen | Peter Maydell | 1 | -1/+6 |
2022-04-01 | target/arm: Determine final stage 2 output PA space based on original IPA | Idan Horowitz | 1 | -3/+5 |
2022-04-01 | target/arm: Take VSTCR.SW, VTCR.NSW into account in final stage 2 walk | Idan Horowitz | 1 | -0/+10 |
2022-04-01 | target/arm: Check VSTCR.SW when assigning the stage 2 output PA space | Idan Horowitz | 1 | -1/+1 |
2022-04-01 | target/arm: Fix MTE access checks for disabled SEL2 | Idan Horowitz | 2 | -2/+2 |
2022-04-01 | target/s390x: Fix determination of overflow condition code after subtraction | Bruno Haible | 1 | -2/+2 |
2022-04-01 | target/s390x: Fix determination of overflow condition code after addition | Bruno Haible | 1 | -2/+2 |
2022-04-01 | target/riscv: rvv: Add missing early exit condition for whole register load/s... | Yueh-Ting (eop) Chen | 1 | -0/+5 |
2022-04-01 | target/riscv: Avoid leaking "no translation" TLB entries | Palmer Dabbelt | 1 | -6/+8 |
2022-03-31 | target/sh4: Remove old README.sh4 file | Thomas Huth | 1 | -150/+0 |
2022-03-29 | target/mips: Fix address space range declaration on n32 | WANG Xuerui | 1 | -1/+1 |
2022-03-26 | target/ppc: fix helper_xvmadd* argument order | Matheus Ferst | 1 | -10/+10 |
2022-03-25 | target/arm: Fix sve_ld1_z and sve_st1_z vs MMIO | Richard Henderson | 1 | -2/+8 |
2022-03-25 | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging | Peter Maydell | 5 | -15/+35 |
2022-03-24 | target/i386: properly reset TSC on reset | Paolo Bonzini | 2 | -1/+14 |
2022-03-24 | target/i386: tcg: high bits SSE cmp operation must be ignored | Paolo Bonzini | 1 | -4/+2 |
2022-03-23 | KVM: x86: workaround invalid CPUID[0xD,9] info on some AMD processors | Paolo Bonzini | 3 | -9/+16 |
2022-03-23 | i386: Set MCG_STATUS_RIPV bit for mce SRAR error | luofei | 1 | -1/+1 |
2022-03-23 | target/i386/kvm: Free xsave_buf when destroying vCPU | Philippe Mathieu-Daudé | 1 | -0/+2 |
2022-03-23 | target/i386: force maximum rounding precision for fildl[l] | Alex Bennée | 1 | -0/+13 |
2022-03-22 | m68k/nios2-semi: fix gettimeofday() result check | Marc-André Lureau | 2 | -2/+2 |
2022-03-21 | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging | Peter Maydell | 1 | -4/+13 |
2022-03-21 | Merge tag 'pull-misc-2022-03-21' of git://repo.or.cz/qemu/armbru into staging | Peter Maydell | 6 | -9/+9 |