index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target
Age
Commit message (
Expand
)
Author
Files
Lines
2023-05-05
target/riscv: expose properties for Zc* extension
Weiwei Li
1
-0
/
+14
2023-05-05
target/riscv: add support for Zcmt extension
Weiwei Li
9
-5
/
+157
2023-05-05
target/riscv: add support for Zcmp extension
Weiwei Li
3
-1
/
+209
2023-05-05
target/riscv: add support for Zcb extension
Weiwei Li
3
-0
/
+125
2023-05-05
target/riscv: add support for Zcd extension
Weiwei Li
2
-4
/
+22
2023-05-05
target/riscv: add support for Zcf extension
Weiwei Li
2
-4
/
+22
2023-05-05
target/riscv: add support for Zca extension
Weiwei Li
2
-4
/
+8
2023-05-05
target/riscv: add cfg properties for Zc* extension
Weiwei Li
2
-0
/
+49
2023-05-05
target/riscv: fix invalid riscv,event-to-mhpmcounters entry
Conor Dooley
1
-1
/
+1
2023-05-05
target/riscv: redirect XVentanaCondOps to use the Zicond functions
Philipp Tomsich
1
-15
/
+3
2023-05-05
target/riscv: refactor Zicond support
Philipp Tomsich
1
-15
/
+21
2023-05-05
target/riscv: Simplify arguments for riscv_csrrw_check
Weiwei Li
1
-8
/
+4
2023-05-05
target/riscv: Simplify type conversion for CPURISCVState
Weiwei Li
7
-44
/
+31
2023-05-05
target/riscv: Simplify getting RISCVCPU pointer from env
Weiwei Li
1
-4
/
+4
2023-05-05
target/riscv: Fix priv version dependency for vector and zfh
LIU Zhiwei
1
-4
/
+4
2023-05-05
target/riscv: Avoid env_archcpu() when reading RISCVCPUConfig
Weiwei Li
3
-35
/
+18
2023-05-02
target/arm: Add compile time asserts to load/store_cpu_field macros
Peter Maydell
1
-4
/
+13
2023-05-02
target/arm: Define and use new load_cpu_field_low32()
Peter Maydell
2
-2
/
+9
2023-05-02
arm/Kconfig: Always select SEMIHOSTING when TCG is present
Fabiano Rosas
1
-0
/
+7
2023-05-02
target/arm: move cpu_tcg to tcg/cpu32.c
Claudio Fontana
4
-12
/
+5
2023-05-02
target/arm: Move 64-bit TCG CPUs into tcg/
Fabiano Rosas
4
-684
/
+731
2023-05-02
target/arm: Do not expose all -cpu max features to qtests
Fabiano Rosas
1
-3
/
+9
2023-05-02
target/arm: Extract TCG -cpu max code into a function
Fabiano Rosas
1
-14
/
+18
2023-05-02
target/arm: Remove dead code from cpu_max_set_sve_max_vq
Fabiano Rosas
1
-6
/
+0
2023-05-02
target/arm: Move cortex sysregs into a separate file
Fabiano Rosas
6
-65
/
+77
2023-04-29
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Richard Henderson
3
-8
/
+53
2023-04-28
target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration
Jiaxi Chen
2
-1
/
+3
2023-04-28
target/i386: Add support for AVX-NE-CONVERT in CPUID enumeration
Jiaxi Chen
2
-1
/
+3
2023-04-28
target/i386: Add support for AVX-VNNI-INT8 in CPUID enumeration
Jiaxi Chen
2
-1
/
+25
2023-04-28
target/i386: Add support for AVX-IFMA in CPUID enumeration
Jiaxi Chen
2
-1
/
+3
2023-04-28
target/i386: Add support for AMX-FP16 in CPUID enumeration
Jiaxi Chen
2
-1
/
+3
2023-04-28
target/i386: Add support for CMPCCXADD in CPUID enumeration
Jiaxi Chen
2
-1
/
+3
2023-04-28
i386/cpu: Update how the EBX register of CPUID 0x8000001F is set
Tom Lendacky
1
-2
/
+2
2023-04-28
i386/sev: Update checks and information related to reduced-phys-bits
Tom Lendacky
1
-3
/
+14
2023-04-28
s390x/gdb: Split s390-virt.xml
Ilya Leoshkevich
1
-20
/
+45
2023-04-23
tcg: Replace tcg_abort with g_assert_not_reached
Richard Henderson
2
-12
/
+12
2023-04-22
Merge tag 'pull-hex-20230421' of https://github.com/quic/qemu into staging
Richard Henderson
24
-1193
/
+1428
2023-04-22
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Richard Henderson
3
-3
/
+7
2023-04-21
Hexagon (target/hexagon) Add overrides for cache/sync/barrier instructions
Taylor Simpson
2
-14
/
+28
2023-04-21
Hexagon (target/hexagon) Remove unused slot variable in helpers
Taylor Simpson
4
-11
/
+9
2023-04-21
Hexagon (target/hexagon) Updates to USR should use get_result_gpr
Taylor Simpson
6
-44
/
+34
2023-04-21
Hexagon (target/hexagon) Add overrides for count trailing zeros/ones
Taylor Simpson
1
-0
/
+24
2023-04-21
Hexagon (target/hexagon) Merge arguments to probe_pkt_scalar_hvx_stores
Taylor Simpson
4
-9
/
+10
2023-04-21
Hexagon (target/hexagon) Remove redundant/unused macros
Taylor Simpson
1
-43
/
+22
2023-04-21
Use black code style for python scripts
Marco Liebel
13
-911
/
+1191
2023-04-21
Use f-strings in python scripts
Marco Liebel
12
-306
/
+250
2023-04-21
Hexagon (translate.c): avoid redundant PC updates on COF
Matheus Tavares Bernardino
1
-8
/
+13
2023-04-21
Merge tag 'pull-request-2023-04-20' of https://gitlab.com/thuth/qemu into sta...
Richard Henderson
1
-9
/
+22
2023-04-20
target/i386: Set family/model/stepping of the "max" CPU according to LM bit
Thomas Huth
1
-9
/
+22
2023-04-20
target/arm: Report pauth information to gdb as 'pauth_v2'
Peter Maydell
1
-5
/
+4
[next]