| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-09-01 | target/arm: Implement fp16 for Neon VABS, VNEG of floats | Peter Maydell | 1 | -6/+28 |
| 2020-09-01 | target/arm: Implement fp16 for Neon VRECPE, VRSQRTE using gvec | Peter Maydell | 1 | -2/+29 |
| 2020-09-01 | target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMUL | Peter Maydell | 3 | -17/+26 |
| 2020-09-01 | target/arm: Implement VFP fp16 VMOV between gp and halfprec registers | Peter Maydell | 2 | -0/+35 |
| 2020-09-01 | target/arm: Implement new VFP fp16 insn VMOVX | Peter Maydell | 2 | -0/+28 |
| 2020-09-01 | target/arm: Implement new VFP fp16 insn VINS | Peter Maydell | 2 | -0/+31 |
| 2020-09-01 | target/arm: Implement VFP fp16 VRINT* | Peter Maydell | 5 | -8/+122 |
| 2020-09-01 | target/arm: Implement VFP fp16 VSEL | Peter Maydell | 2 | -6/+16 |
| 2020-09-01 | target/arm: Implement VFP vp16 VCVT-with-specified-rounding-mode | Peter Maydell | 2 | -10/+28 |
| 2020-09-01 | target/arm: Implement VFP fp16 VCVT between float and fixed-point | Peter Maydell | 2 | -0/+61 |
| 2020-09-01 | target/arm: Use macros instead of open-coding fp16 conversion helpers | Peter Maydell | 2 | -80/+12 |
| 2020-09-01 | target/arm: Make VFP_CONV_FIX macros take separate float type and float size | Peter Maydell | 1 | -23/+23 |
| 2020-09-01 | target/arm: Implement VFP fp16 VCVT between float and integer | Peter Maydell | 2 | -0/+69 |
| 2020-09-01 | target/arm: Implement VFP fp16 VLDR and VSTR | Peter Maydell | 2 | -2/+36 |
| 2020-09-01 | target/arm: Implement VFP fp16 VCMP | Peter Maydell | 4 | -7/+51 |
| 2020-09-01 | target/arm: Implement VFP fp16 for VMOV immediate | Peter Maydell | 2 | -0/+24 |
| 2020-09-01 | target/arm: Implement VFP fp16 for VABS, VNEG, VSQRT | Peter Maydell | 4 | -0/+55 |
| 2020-09-01 | target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp() | Peter Maydell | 1 | -35/+14 |
| 2020-09-01 | target/arm: Implement VFP fp16 for fused-multiply-add | Peter Maydell | 4 | -0/+77 |
| 2020-09-01 | target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMS | Peter Maydell | 1 | -37/+13 |
| 2020-09-01 | target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMUL | Peter Maydell | 4 | -0/+95 |
| 2020-09-01 | target/arm: Implement VFP fp16 for VFP_BINOP operations | Peter Maydell | 5 | -0/+106 |
| 2020-09-01 | target/arm: Use correct ID register check for aa32_fp16_arith | Peter Maydell | 1 | -6/+1 |
| 2020-09-01 | target/arm: Remove local definitions of float constants | Peter Maydell | 3 | -19/+0 |
| 2020-08-28 | softfloat: Implement the full set of comparisons for float16 | Kito Cheng | 1 | -25/+0 |
| 2020-08-28 | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200828'... | Peter Maydell | 10 | -398/+446 |
| 2020-08-28 | target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd | Richard Henderson | 3 | -10/+81 |
| 2020-08-28 | target/arm: Convert integer multiply-add (indexed) to gvec for aa64 advsimd | Richard Henderson | 3 | -0/+73 |
| 2020-08-28 | target/arm: Convert integer multiply (indexed) to gvec for aa64 advsimd | Richard Henderson | 3 | -4/+45 |
| 2020-08-28 | target/arm: Generalize inl_qrdmlah_* helper functions | Richard Henderson | 1 | -51/+29 |
| 2020-08-28 | target/arm: Tidy SVE tszimm shift formats | Richard Henderson | 1 | -19/+16 |
| 2020-08-28 | target/arm: Split out gen_gvec_ool_zz | Richard Henderson | 1 | -8/+12 |
| 2020-08-28 | target/arm: Split out gen_gvec_ool_zzz | Richard Henderson | 1 | -35/+18 |
| 2020-08-28 | target/arm: Split out gen_gvec_ool_zzp | Richard Henderson | 1 | -15/+14 |
| 2020-08-28 | target/arm: Merge helper_sve_clr_* and helper_sve_movz_* | Richard Henderson | 3 | -92/+32 |
| 2020-08-28 | target/arm: Split out gen_gvec_ool_zzzp | Richard Henderson | 1 | -19/+16 |
| 2020-08-28 | target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_pppp | Richard Henderson | 1 | -23/+8 |
| 2020-08-28 | target/arm: Clean up 4-operand predicate expansion | Richard Henderson | 1 | -68/+43 |
| 2020-08-28 | target/arm: Merge do_vector2_p into do_mov_p | Richard Henderson | 1 | -13/+6 |
| 2020-08-28 | target/arm: Rearrange {sve,fp}_check_access assert | Richard Henderson | 2 | -11/+17 |
| 2020-08-28 | target/arm: Split out gen_gvec_fn_zzz, do_zzz_fn | Richard Henderson | 1 | -19/+24 |
| 2020-08-28 | target/arm: Split out gen_gvec_fn_zz | Richard Henderson | 1 | -9/+10 |
| 2020-08-28 | target/arm: Fill in the WnR syndrome bit in mte_check_fail | Richard Henderson | 1 | -4/+5 |
| 2020-08-28 | target/arm: Pass the entire mte descriptor to mte_check_fail | Richard Henderson | 1 | -5/+5 |
| 2020-08-28 | target/arm: Clarify HCR_EL2 ARMCPRegInfo type | Philippe Mathieu-Daudé | 1 | -1/+0 |
| 2020-08-27 | hvf: Move HVFState typedef to hvf.h | Eduardo Habkost | 1 | -2/+2 |
| 2020-08-25 | target/riscv: Support the Virtual Instruction fault | Alistair Francis | 5 | -6/+109 |
| 2020-08-25 | target/riscv: Return the exception from invalid CSR accesses | Alistair Francis | 2 | -29/+35 |
| 2020-08-25 | target/riscv: Support the v0.6 Hypervisor extension CRSs | Alistair Francis | 2 | -0/+43 |
| 2020-08-25 | target/riscv: Only support little endian guests | Alistair Francis | 1 | -0/+5 |
