index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target
Age
Commit message (
Expand
)
Author
Files
Lines
2017-10-27
Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging
Peter Maydell
22
-56
/
+91
2017-10-26
tcg: Avoid setting tcg_initialize if !CONFIG_TCG
Richard Henderson
5
-0
/
+10
2017-10-25
ppc: Support Capstone in disas_set_info
Richard Henderson
1
-0
/
+6
2017-10-25
arm: Support Capstone in disas_set_info
Richard Henderson
1
-3
/
+18
2017-10-25
i386: Support Capstone in disas_set_info
Richard Henderson
1
-0
/
+7
2017-10-25
disas: Remove unused flags arguments
Richard Henderson
19
-22
/
+19
2017-10-25
target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLY
Richard Henderson
1
-2
/
+7
2017-10-25
target/arm: Move BE32 disassembler fixup
Richard Henderson
1
-19
/
+0
2017-10-25
target/ppc: Convert to disas_set_info hook
Richard Henderson
2
-4
/
+22
2017-10-25
target/i386: Convert to disas_set_info hook
Richard Henderson
2
-7
/
+13
2017-10-24
tcg: Initialize cpu_env generically
Richard Henderson
22
-80
/
+0
2017-10-24
tcg: define tcg_init_ctx and make tcg_ctx a pointer
Emilio G. Cota
21
-21
/
+21
2017-10-24
target/sparc: check CF_PARALLEL instead of parallel_cpus
Emilio G. Cota
1
-1
/
+1
2017-10-24
target/sh4: check CF_PARALLEL instead of parallel_cpus
Emilio G. Cota
1
-1
/
+1
2017-10-24
target/s390x: check CF_PARALLEL instead of parallel_cpus
Emilio G. Cota
3
-22
/
+88
2017-10-24
target/m68k: check CF_PARALLEL instead of parallel_cpus
Emilio G. Cota
3
-15
/
+31
2017-10-24
target/i386: check CF_PARALLEL instead of parallel_cpus
Emilio G. Cota
1
-2
/
+2
2017-10-24
target/hppa: check CF_PARALLEL instead of parallel_cpus
Emilio G. Cota
3
-6
/
+40
2017-10-24
target/arm: check CF_PARALLEL instead of parallel_cpus
Emilio G. Cota
5
-21
/
+68
2017-10-24
tcg: convert tb->cflags reads to tb_cflags(tb)
Emilio G. Cota
22
-117
/
+118
2017-10-24
qom: Introduce CPUClass.tcg_initialize
Richard Henderson
30
-160
/
+28
2017-10-24
tcg: Remove TCGV_EQUAL*
Richard Henderson
4
-9
/
+9
2017-10-24
tcg: Remove GET_TCGV_* and MAKE_TCGV_*
Richard Henderson
1
-10
/
+5
2017-10-21
openrisc/cputimer: Perparation for Multicore
Stafford Horne
4
-5
/
+5
2017-10-21
target/openrisc: Make coreid and numcores variable
Stafford Horne
1
-2
/
+3
2017-10-20
s390x/tcg: low-address protection support
David Hildenbrand
3
-45
/
+62
2017-10-20
s390x: refactor error handling for MSCH handler
Halil Pasic
1
-19
/
+4
2017-10-20
s390x: refactor error handling for HSCH handler
Halil Pasic
1
-19
/
+4
2017-10-20
s390x: refactor error handling for CSCH handler
Halil Pasic
1
-10
/
+4
2017-10-20
s390x: refactor error handling for XSCH handler
Halil Pasic
1
-19
/
+4
2017-10-20
s390x: improve error handling for SSCH and RSCH
Halil Pasic
1
-46
/
+7
2017-10-20
s390x: move s390x_new_cpu() into board code
Igor Mammedov
2
-21
/
+0
2017-10-20
s390x: fix cpu object referrence leak in s390x_new_cpu()
Igor Mammedov
1
-1
/
+1
2017-10-20
target/s390x: special handling when starting a CPU with WAIT PSW
David Hildenbrand
2
-3
/
+14
2017-10-20
s390x/tcg: refactor stfl(e) to use s390_get_feat_block()
David Hildenbrand
2
-39
/
+29
2017-10-20
s390x/tcg: unlock NMI
David Hildenbrand
1
-5
/
+0
2017-10-20
s390x/cpumodel: allow to enable SENSE RUNNING STATUS for qemu
David Hildenbrand
1
-0
/
+1
2017-10-20
s390x/tcg: switch to new SIGP handling code
David Hildenbrand
4
-40
/
+11
2017-10-20
s390x/tcg: flush the tlb on SIGP SET PREFIX
David Hildenbrand
1
-0
/
+1
2017-10-20
s390x/tcg: implement STOP and RESET interrupts for TCG
David Hildenbrand
6
-6
/
+51
2017-10-20
s390x/tcg: implement SIGP CONDITIONAL EMERGENCY SIGNAL
David Hildenbrand
2
-0
/
+38
2017-10-20
s390x/tcg: implement SIGP EMERGENCY SIGNAL
David Hildenbrand
1
-0
/
+15
2017-10-20
s390x/tcg: implement SIGP EXTERNAL CALL
David Hildenbrand
1
-2
/
+23
2017-10-20
s390x/tcg: implement SIGP SENSE
David Hildenbrand
1
-0
/
+29
2017-10-20
s390x/tcg: implement SIGP SENSE RUNNING STATUS
David Hildenbrand
2
-0
/
+27
2017-10-20
s390x/kvm: factor out actual handling of STOP interrupts
David Hildenbrand
3
-8
/
+16
2017-10-20
s390x/kvm: factor out SIGP code into sigp.c
David Hildenbrand
9
-359
/
+385
2017-10-20
s390x/kvm: drop two debug prints
David Hildenbrand
1
-2
/
+0
2017-10-20
s390x/kvm: factor out storing of adtl CPU status
David Hildenbrand
3
-29
/
+31
2017-10-20
s390x/kvm: factor out storing of CPU status
David Hildenbrand
3
-66
/
+65
[next]