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2019-01-14i386/kvm: add a comment explaining why .feat_names are commented out for Hype...Vitaly Kuznetsov1-0/+7
2019-01-14x86: host-phys-bits-limit optionEduardo Habkost2-0/+8
2019-01-14target/i386: Disable MPX support on named CPU modelsPaolo Bonzini1-7/+7
2019-01-14target-i386: Reenable RDTSCP support on Opteron_G[345] CPU models CPU modelsBorislav Petkov1-7/+4
2019-01-14i386/kvm: expose HV_CPUID_ENLIGHTMENT_INFO.EAX and HV_CPUID_NESTED_FEATURES.E...Vitaly Kuznetsov3-40/+77
2019-01-14Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-3.2-part2'...Peter Maydell7-609/+933
2019-01-11avoid TABs in files that only contain a fewPaolo Bonzini7-16/+16
2019-01-11qemu/queue.h: leave head structs anonymous unless necessaryPaolo Bonzini2-2/+2
2019-01-11hax: Support for Linux hostsAlexandro Sanchez Bach4-6/+6
2019-01-09RISC-V: Implement existential predicates for CSRsMichael Clark4-79/+105
2019-01-09RISC-V: Implement atomic mip/sip CSR updatesMichael Clark1-28/+28
2019-01-09ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPUCédric Le Goater1-1/+2
2019-01-09ppc/xive: introduce a XiveTCTX pointer under PowerPCCPUCédric Le Goater1-0/+2
2019-01-09target/ppc: replace AVR* macros with Vsr* macrosMark Cave-Ayland1-17/+13
2019-01-09target/ppc: move FP and VMX registers into aligned vsr register arrayMark Cave-Ayland12-70/+149
2019-01-09target/ppc: merge ppc_vsr_t and ppc_avr_t union typesMark Cave-Ayland3-45/+39
2019-01-09target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_envMark Cave-Ayland2-45/+18
2019-01-09target/ppc: introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() helpers for V...Mark Cave-Ayland1-224/+638
2019-01-09target/ppc: introduce get_avr64() and set_avr64() helpers for VMX register ac...Mark Cave-Ayland2-33/+124
2019-01-09target/ppc: introduce get_fpr() and set_fpr() helpers for FP register accessMark Cave-Ayland2-110/+386
2019-01-09target/ppc: switch EXTRACT_HELPER macros over to use sextract32/extract32Mark Cave-Ayland1-4/+4
2019-01-09target/ppc: fix typo in SIMM5 extraction helperMark Cave-Ayland1-1/+1
2019-01-08RISC-V: Implement modular CSR helper interfaceMichael Clark6-606/+904
2019-01-08target/alpha: Fix user-only initialization of fpcrRichard Henderson1-3/+3
2019-01-07Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190107'...Peter Maydell5-144/+107
2019-01-07target/arm: Emit barriers for A32/T32 load-acquire/store-release insnsPeter Maydell1-7/+26
2019-01-07target/arm: SVE brk[ab] merging does not have s bitRichard Henderson1-2/+3
2019-01-07target/arm: Convert ARM_TBFLAG_* to FIELDsRichard Henderson4-135/+78
2019-01-07arm: replace instance_post_init()Marc-André Lureau4-10/+49
2019-01-07qdev-props: remove errp from GlobalPropertyMarc-André Lureau2-2/+0
2019-01-04Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-december-2018...Peter Maydell1-126/+883
2019-01-03target/mips: Support R5900 three-operand MADD1 and MADDU1 instructionsFredrik Noring1-3/+9
2019-01-03target/mips: Support R5900 three-operand MADD and MADDU instructionsPhilippe Mathieu-Daudé1-5/+53
2019-01-03target/mips: MXU: Add handler for an align instructionAleksandar Markovic1-3/+194
2019-01-03target/mips: MXU: Add handlers for max/min instructionsAleksandar Markovic1-21/+279
2019-01-03target/mips: MXU: Add handlers for logic instructionsAleksandar Markovic1-34/+205
2019-01-03target/mips: MXU: Improve the comment containing MXU overviewAleksandar Markovic1-30/+44
2019-01-03target/mips: MXU: Add generic naming for optn2 constantsAleksandar Markovic1-0/+5
2019-01-03target/mips: MXU: Add missing opcodes/decoding for LX* instructionsAleksandar Markovic1-38/+102
2019-01-03Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-3.2-part1'...Peter Maydell3-11/+13
2018-12-21Changes requirement for "vsubsbs" instructionPaul A. Clarke1-1/+1
2018-12-21target/ppc: use g_new(T, n) instead of g_malloc(sizeof(T) * n)Greg Kurz1-3/+3
2018-12-21target/ppc: tcg: Implement addex instructionSuraj Jitindar Singh1-27/+33
2018-12-21target/ppc: Remove silly GETFIELD/SETFIELD/MASK_TO_LSH macrosDavid Gibson1-12/+0
2018-12-21target/ppc: fix the PPC_BIT definitionsCédric Le Goater1-3/+3
2018-12-20riscv/cpu: use device_class_set_parent_realizeMao Zhongyi1-2/+2
2018-12-20target/riscv/pmp.c: Fix pmp_decode_napot()Anup Patel1-1/+1
2018-12-20RISC-V: Add hartid and \n to interrupt loggingMichael Clark1-8/+10
2018-12-20Clean up includesMarkus Armbruster3-3/+2
2018-12-19Merge remote-tracking branch 'remotes/vivier2/tags/trivial-patches-pull-reque...Peter Maydell1-2/+0