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2019-05-21Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into stagingPeter Maydell8-1107/+2524
2019-05-16Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into stagingPeter Maydell3-18/+25
2019-05-15target/xtensa: implement exclusive access optionMax Filippov6-2/+152
2019-05-15target/xtensa: update list of exception causesMax Filippov1-4/+5
2019-05-15target/xtensa: implement block prefetch option opcodesMax Filippov1-0/+42
2019-05-14target/xtensa: implement DIWBUI.P opcodeMax Filippov3-0/+12
2019-05-13target/xtensa: Use tcg_gen_abs_i32Richard Henderson1-8/+1
2019-05-13Clean up decorations and whitespace around header guardsMarkus Armbruster1-1/+1
2019-05-13target/xtensa: Clean up core-isa.h header guardsMarkus Armbruster4-20/+12
2019-05-10target/xtensa: implement MPU optionMax Filippov6-1/+566
2019-05-10target/xtensa: add parity/ECC option SRsMax Filippov3-0/+170
2019-05-10target/xtensa: define IDMA and gather/scatter IRQ typesMax Filippov2-0/+6
2019-05-10target/xtensa: make internal MMU functions staticMax Filippov2-95/+87
2019-05-10target/xtensa: get rid of centralized SR propertiesMax Filippov3-1005/+1484
2019-05-10tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson1-6/+0
2019-05-10target/xtensa: Convert to CPUClass::tlb_fillRichard Henderson3-18/+31
2019-04-24tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson1-2/+2
2019-04-18qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster2-21/+22
2019-04-18target: Clean up how the dump_mmu() printMarkus Armbruster3-15/+13
2019-04-18target: Simplify how the TARGET_cpu_list() printMarkus Armbruster2-4/+5
2019-03-23target/xtensa: don't announce exit simcallMax Filippov1-1/+0
2019-03-21target/xtensa: fix break_dependency for repeated resourcesMax Filippov1-1/+0
2019-02-28target/xtensa: implement PREFCTL SRMax Filippov2-0/+17
2019-02-28target/xtensa: prioritize load/store in FLIX bundlesMax Filippov2-5/+36
2019-02-28target/xtensa: break circular register dependenciesMax Filippov1-4/+123
2019-02-28target/xtensa: reorganize access to boolean registersMax Filippov1-8/+42
2019-02-28target/xtensa: reorganize access to MAC16 registersMax Filippov1-94/+92
2019-02-28target/xtensa: reorganize register handling in translatorsMax Filippov3-344/+386
2019-02-28target/xtensa: only rotate window in the retw helperMax Filippov3-9/+10
2019-02-28target/xtensa: move WINDOW_BASE SR update to postprocessingMax Filippov4-20/+28
2019-02-28target/xtensa: add generic instruction post-processingMax Filippov2-8/+33
2019-02-28target/xtensa: sort FLIX instruction opcodesMax Filippov2-8/+221
2019-02-18target/xtensa: implement wide branches and loopsMax Filippov1-27/+102
2019-02-18target/xtensa: allow multiple names for single opcodeMax Filippov3-60/+60
2019-02-18target/xtensa: don't require opcode table sortingMax Filippov3-16/+42
2019-02-18target/xtensa: move xtensa_finalize_config to xtensa_core_class_initMax Filippov3-19/+19
2019-02-18target/xtensa: fixup test_mmuhifi_c3 overlayMax Filippov1-661/+661
2019-02-11target/xtensa: get rid of gen_callw[i]Max Filippov1-21/+14
2019-02-10target/xtensa: don't specify windowed registers manuallyMax Filippov3-484/+12
2019-02-08target/xtensa/import_core.sh: don't add duplicate 'static'Max Filippov1-1/+1
2019-01-28target/xtensa: add test_mmuhifi_c3 coreMax Filippov5-0/+36981
2019-01-28target/xtensa: expose core runstall as an IRQ lineMax Filippov1-0/+2
2019-01-28target/xtensa: rearrange access to external interruptsMax Filippov1-2/+3
2019-01-28target/xtensa: drop function xtensa_timer_irqMax Filippov1-1/+0
2019-01-24target/xtensa: fix access to the INTERRUPT SRMax Filippov4-12/+19
2019-01-24target/xtensa: add qemu_cpu_kick to xtensa_runstallMax Filippov1-1/+1
2019-01-13target/xtensa: move non-HELPER functions to helper.cMax Filippov2-59/+58
2019-01-13target/xtensa: drop dump_state helperMax Filippov2-12/+0
2019-01-13target/xtensa: extract interrupt and exception helpersMax Filippov4-220/+259
2019-01-13target/xtensa: extract debug helpersMax Filippov3-92/+130