aboutsummaryrefslogtreecommitdiff
path: root/target/xtensa/cpu.c
AgeCommit message (Expand)AuthorFilesLines
2024-07-11target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementationPeter Maydell1-0/+1
2024-04-25hw, target: Add ResetType argument to hold and exit phase methodsPeter Maydell1-2/+2
2024-03-12target/xtensa: Prefer fast cpu_env() over slower CPU QOM cast macroPhilippe Mathieu-Daudé1-2/+1
2024-03-12target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handlerPhilippe Mathieu-Daudé1-4/+4
2024-02-03target/xtensa: Populate CPUClass.mmu_indexRichard Henderson1-0/+6
2024-01-29include/qemu: Add TCGCPUOps typedef to typedefs.hRichard Henderson1-1/+1
2024-01-19target/xtensa: use generic instruction breakpoint infrastructureMax Filippov1-0/+1
2024-01-05cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()Philippe Mathieu-Daudé1-3/+1
2023-11-07hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name()Philippe Mathieu-Daudé1-2/+1
2023-10-04accel/tcg: Remove cpu_set_cpustate_pointersRichard Henderson1-1/+0
2023-10-03target/*: Add instance_align to all cpu base classesRichard Henderson1-0/+1
2023-02-27target/xtensa/cpu: Include missing "memory.h" headerPhilippe Mathieu-Daudé1-0/+3
2022-12-16target/xtensa: Convert to 3-phase resetPeter Maydell1-4/+8
2022-10-26target/xtensa: Convert to tcg_ops restore_state_to_opcRichard Henderson1-0/+10
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson1-0/+8
2022-05-06target/xtensa: add clock input to xtensa CPUMax Filippov1-0/+15
2021-11-02target/xtensa: Make xtensa_cpu_tlb_fill sysemu onlyRichard Henderson1-1/+1
2021-09-14target/xtensa: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé1-1/+1
2021-05-26hw/core: Constify TCGCPUOpsRichard Henderson1-1/+1
2021-05-26cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé1-0/+6
2021-05-26cpu: Assert DeviceClass::vmsd is NULL on user emulationPhilippe Mathieu-Daudé1-1/+3
2021-05-20target/xtensa: don't generate extra EXCP_DEBUG on exceptionMax Filippov1-1/+0
2021-02-05cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana1-7/+16
2021-02-05cpu: move do_unaligned_access to tcg_opsClaudio Fontana1-1/+1
2021-02-05cpu: move cc->transaction_failed to tcg_opsClaudio Fontana1-1/+1
2021-02-05cpu: move cc->do_interrupt to tcg_opsClaudio Fontana1-1/+1
2021-02-05cpu: Move debug_excp_handler to tcg_opsEduardo Habkost1-1/+1
2021-02-05cpu: Move tlb_fill to tcg_opsEduardo Habkost1-1/+1
2021-02-05cpu: Move cpu_exec_* to tcg_opsEduardo Habkost1-1/+1
2021-02-05cpu: Introduce TCGCpuOperations structEduardo Habkost1-1/+1
2020-10-26target/xtensa: enable all coprocessors for linux-userMax Filippov1-0/+1
2020-08-21target/xtensa: add DFPU registers and opcodesMax Filippov1-0/+5
2020-03-17cpu: Use DeviceClass reset instead of a special CPUClass resetPeter Maydell1-4/+4
2020-01-24cpu: Use cpu_class_set_parent_reset()Greg Kurz1-2/+1
2019-09-11target/xtensa: linux-user: add call0 ABI supportMax Filippov1-4/+20
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster1-1/+1
2019-06-10cpu: Introduce cpu_set_cpustate_pointersRichard Henderson1-2/+1
2019-05-21Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into stagingPeter Maydell1-1/+1
2019-05-15target/xtensa: implement exclusive access optionMax Filippov1-0/+1
2019-05-10target/xtensa: implement MPU optionMax Filippov1-1/+0
2019-05-10target/xtensa: Convert to CPUClass::tlb_fillRichard Henderson1-3/+2
2018-09-17target/xtensa: convert to do_transaction_failedMax Filippov1-1/+1
2018-08-06target/xtensa/cpu: Set owner of memory region in xtensa_cpu_initfnThomas Huth1-1/+1
2018-06-01target: Do not include "exec/exec-all.h" if it is not necessaryPhilippe Mathieu-Daudé1-1/+0
2018-03-16target/xtensa: add linux-user supportMax Filippov1-4/+22
2018-02-05qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé1-2/+2
2018-01-09target/xtensa: implement disassemblerMax Filippov1-0/+9
2017-10-27xtensa: cleanup cpu type name compositionIgor Mammedov1-1/+1
2017-10-24qom: Introduce CPUClass.tcg_initializeRichard Henderson1-6/+1