| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-05-15 | accel/tcg: Provide default implementation of disas_log | Richard Henderson | 1 | -9/+0 |
| 2024-05-06 | Merge tag 'qemu-sparc-20240506' of https://github.com/mcayland/qemu into staging | Richard Henderson | 5 | -189/+208 |
| 2024-05-06 | accel/tcg: Access tcg_cflags with getter / setter | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2024-05-06 | exec/cpu: Extract page-protection definitions to page-protection.h | Philippe Mathieu-Daudé | 2 | -0/+2 |
| 2024-05-05 | target/sparc: Split out do_ms16b | Richard Henderson | 1 | -54/+24 |
| 2024-05-05 | target/sparc: Fix FPMERGE | Richard Henderson | 3 | -15/+16 |
| 2024-05-05 | target/sparc: Fix FMULD8*X16 | Richard Henderson | 3 | -52/+44 |
| 2024-05-05 | target/sparc: Fix FMUL8x16A{U,L} | Richard Henderson | 3 | -40/+48 |
| 2024-05-05 | target/sparc: Fix FMUL8x16 | Richard Henderson | 3 | -6/+26 |
| 2024-05-05 | target/sparc: Fix FEXPAND | Richard Henderson | 4 | -6/+24 |
| 2024-05-05 | target/sparc/cpu: Avoid spaces by default in the CPU names | Thomas Huth | 1 | -28/+28 |
| 2024-05-05 | target/sparc/cpu: Rename the CPU models with a "+" in their names | Thomas Huth | 1 | -2/+12 |
| 2024-04-26 | target/sparc: Replace abi_ulong by uint32_t for TARGET_ABI32 | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2024-04-26 | target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' | Philippe Mathieu-Daudé | 2 | -23/+23 |
| 2024-04-25 | hw, target: Add ResetType argument to hold and exit phase methods | Peter Maydell | 1 | -2/+2 |
| 2024-04-12 | target/sparc: Use GET_ASI_CODE for ASI_KERNELTXT and ASI_USERTXT | Richard Henderson | 3 | -22/+94 |
| 2024-03-18 | target/sparc/cpu: Improve the CPU help text | Thomas Huth | 1 | -2/+3 |
| 2024-03-12 | target/sparc: Prefer fast cpu_env() over slower CPU QOM cast macro | Philippe Mathieu-Daudé | 7 | -38/+18 |
| 2024-03-12 | target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handler | Philippe Mathieu-Daudé | 1 | -3/+3 |
| 2024-03-05 | accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull | Richard Henderson | 1 | -1/+1 |
| 2024-02-21 | target/sparc: correct typos | Manos Pitsidianakis | 1 | -4/+4 |
| 2024-02-15 | target/sparc: implement asr17 feature for smp | Clément Chigot | 3 | -10/+20 |
| 2024-02-15 | target/sparc: Provide hint about CPUSPARCState::irq_manager member | Philippe Mathieu-Daudé | 1 | -3/+2 |
| 2024-02-03 | target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc | Richard Henderson | 1 | -2/+2 |
| 2024-02-03 | target/sparc: Remove FSR_FTT_NMASK, FSR_FTT_CEXC_NMASK | Richard Henderson | 1 | -7/+0 |
| 2024-02-03 | target/sparc: Split fcc out of env->fsr | Richard Henderson | 4 | -522/+198 |
| 2024-02-03 | target/sparc: Remove cpu_fsr | Richard Henderson | 3 | -113/+114 |
| 2024-02-03 | target/sparc: Split cexc and ftt from env->fsr | Richard Henderson | 4 | -38/+48 |
| 2024-02-03 | target/sparc: Merge check_ieee_exceptions with FPop helpers | Richard Henderson | 3 | -129/+219 |
| 2024-02-03 | target/sparc: Clear cexc and ftt in do_check_ieee_exceptions | Richard Henderson | 2 | -16/+2 |
| 2024-02-03 | target/sparc: Split ver from env->fsr | Richard Henderson | 3 | -16/+23 |
| 2024-02-03 | target/sparc: Introduce cpu_get_fsr, cpu_put_fsr | Richard Henderson | 7 | -12/+70 |
| 2024-02-03 | target/sparc: Remove qt0, qt1 temporaries | Richard Henderson | 3 | -8/+0 |
| 2024-02-03 | target/sparc: Use i128 for Fdmulq | Richard Henderson | 3 | -16/+9 |
| 2024-02-03 | target/sparc: Use i128 for FdTOq, FxTOq | Richard Henderson | 3 | -10/+11 |
| 2024-02-03 | target/sparc: Use i128 for FsTOq, FiTOq | Richard Henderson | 3 | -10/+11 |
| 2024-02-03 | target/sparc: Use i128 for FCMPq, FCMPEq | Richard Henderson | 3 | -52/+41 |
| 2024-02-03 | target/sparc: Use i128 for FqTOd, FqTOx | Richard Henderson | 3 | -9/+10 |
| 2024-02-03 | target/sparc: Use i128 for FqTOs, FqTOi | Richard Henderson | 3 | -9/+10 |
| 2024-02-03 | target/sparc: Use i128 for FADDq, FSUBq, FMULq, FDIVq | Richard Henderson | 3 | -28/+26 |
| 2024-02-03 | target/sparc: Use i128 for FSQRTq | Richard Henderson | 3 | -8/+32 |
| 2024-02-03 | target/sparc: Inline FNEG, FABS | Richard Henderson | 3 | -72/+30 |
| 2024-02-03 | target/sparc: Introduce gen_{load,store}_fpr_Q | Richard Henderson | 1 | -6/+19 |
| 2024-02-03 | target/sparc: Remove gen_dest_fpr_F | Richard Henderson | 1 | -11/+6 |
| 2024-02-03 | target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for ASI_M_BFILL | Richard Henderson | 1 | -16/+15 |
| 2024-02-03 | target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for ASI_M_BCOPY | Richard Henderson | 1 | -19/+26 |
| 2024-02-03 | include/exec: Change cpu_mmu_index argument to CPUState | Richard Henderson | 3 | -3/+3 |
| 2024-02-03 | include/exec: Implement cpu_mmu_index generically | Richard Henderson | 2 | -7/+1 |
| 2024-02-03 | target/sparc: Populate CPUClass.mmu_index | Richard Henderson | 2 | -28/+35 |
| 2024-01-29 | include/qemu: Add TCGCPUOps typedef to typedefs.h | Richard Henderson | 1 | -1/+1 |
