Age | Commit message (Expand) | Author | Files | Lines |
2024-01-29 | include/qemu: Add TCGCPUOps typedef to typedefs.h | Richard Henderson | 1 | -1/+1 |
2024-01-29 | target: Use vaddr in gen_intermediate_code | Anton Johansson | 1 | -1/+1 |
2024-01-08 | system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() | Stefan Hajnoczi | 3 | -14/+14 |
2024-01-05 | target/sparc: Simplify qemu_irq_ack | Clément Chigot | 2 | -2/+2 |
2023-12-29 | target/sparc: Constify VMState in machine.c | Richard Henderson | 1 | -4/+4 |
2023-11-14 | target/sparc: Fix RETURN | Richard Henderson | 1 | -1/+1 |
2023-11-07 | target: Move ArchCPUClass definition to 'cpu.h' | Philippe Mathieu-Daudé | 2 | -20/+16 |
2023-11-07 | target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h' | Philippe Mathieu-Daudé | 2 | -3/+4 |
2023-11-07 | target: Unify QOM style | Philippe Mathieu-Daudé | 2 | -4/+0 |
2023-11-05 | target/sparc: Check for invalid cond in gen_compare_reg | Richard Henderson | 1 | -19/+26 |
2023-11-05 | target/sparc: Implement UDIV inline | Richard Henderson | 2 | -14/+56 |
2023-11-05 | target/sparc: Implement UDIVX and SDIVX inline | Richard Henderson | 4 | -44/+97 |
2023-11-05 | target/sparc: Discard cpu_cond at the end of each insn | Richard Henderson | 1 | -0/+27 |
2023-11-05 | target/sparc: Record entire jump condition in DisasContext | Richard Henderson | 1 | -11/+16 |
2023-11-05 | target/sparc: Merge gen_op_next_insn into only caller | Richard Henderson | 1 | -7/+2 |
2023-11-05 | target/sparc: Pass displacement to advance_jump_cond | Richard Henderson | 1 | -7/+5 |
2023-11-05 | target/sparc: Merge advance_jump_uncond_{never,always} into advance_jump_cond | Richard Henderson | 1 | -44/+30 |
2023-11-05 | target/sparc: Merge gen_branch2 into advance_pc | Richard Henderson | 1 | -14/+14 |
2023-11-05 | target/sparc: Do flush_cond in advance_jump_cond | Richard Henderson | 1 | -6/+4 |
2023-11-05 | target/sparc: Always copy conditions into a new temporary | Richard Henderson | 1 | -1/+2 |
2023-11-05 | target/sparc: Change DisasCompare.c2 to int | Richard Henderson | 1 | -15/+18 |
2023-11-05 | target/sparc: Remove DisasCompare.is_bool | Richard Henderson | 1 | -15/+7 |
2023-11-05 | target/sparc: Remove CC_OP leftovers | Richard Henderson | 9 | -173/+26 |
2023-11-05 | target/sparc: Remove CC_OP_TADDTV, CC_OP_TSUBTV | Richard Henderson | 4 | -200/+32 |
2023-11-05 | target/sparc: Remove CC_OP_SUB, CC_OP_SUBX, CC_OP_TSUB | Richard Henderson | 3 | -261/+42 |
2023-11-05 | target/sparc: Remove CC_OP_ADD, CC_OP_ADDX, CC_OP_TADD | Richard Henderson | 3 | -255/+87 |
2023-11-05 | target/sparc: Remove CC_OP_DIV | Richard Henderson | 5 | -110/+93 |
2023-11-05 | target/sparc: Remove CC_OP_LOGIC | Richard Henderson | 3 | -53/+28 |
2023-11-05 | target/sparc: Split psr and xcc into components | Richard Henderson | 5 | -261/+275 |
2023-11-05 | target/sparc: Introduce cpu_put_psr_icc | Richard Henderson | 2 | -1/+7 |
2023-10-25 | target/sparc: Remove disas_sparc_legacy | Richard Henderson | 1 | -144/+1 |
2023-10-25 | target/sparc: Convert FZERO, FONE to decodetree | Richard Henderson | 2 | -29/+45 |
2023-10-25 | target/sparc: Move FPACK16, FPACKFIX to decodetree | Richard Henderson | 2 | -15/+42 |
2023-10-25 | target/sparc: Move FPCMP* to decodetree | Richard Henderson | 2 | -52/+47 |
2023-10-25 | target/sparc: Convert FCMP, FCMPE to decodetree | Richard Henderson | 2 | -56/+96 |
2023-10-25 | target/sparc: Move FMOVR, FMOVcc, FMOVfcc to decodetree | Richard Henderson | 2 | -113/+91 |
2023-10-25 | target/sparc: Move FMOVq, FNEGq, FABSq to decodetree | Richard Henderson | 2 | -94/+51 |
2023-10-25 | target/sparc: Move FdTOq, FxTOq to decodetree | Richard Henderson | 2 | -21/+28 |
2023-10-25 | target/sparc: Move FiTOq, FsTOq to decodetree | Richard Henderson | 2 | -20/+26 |
2023-10-25 | target/sparc: Move FqTOd, FqTOx to decodetree | Richard Henderson | 2 | -22/+29 |
2023-10-25 | target/sparc: Move FqTOs, FqTOi to decodetree | Richard Henderson | 2 | -22/+28 |
2023-10-25 | target/sparc: Move FiTOd, FsTOd, FsTOx to decodetree | Richard Henderson | 2 | -40/+30 |
2023-10-25 | target/sparc: Move gen_fop_FD insns to decodetree | Richard Henderson | 2 | -24/+30 |
2023-10-25 | target/sparc: Move FDMULQ to decodetree | Richard Henderson | 2 | -19/+23 |
2023-10-25 | target/sparc: Move FSMULD to decodetree | Richard Henderson | 2 | -20/+24 |
2023-10-25 | target/sparc: Move gen_fop_QQQ insns to decodetree | Richard Henderson | 2 | -26/+30 |
2023-10-25 | target/sparc: Move gen_fop_DDD insns to decodetree | Richard Henderson | 2 | -27/+32 |
2023-10-25 | target/sparc: Move gen_fop_FFF insns to decodetree | Richard Henderson | 2 | -27/+31 |
2023-10-25 | target/sparc: Move FSQRTq to decodetree | Richard Henderson | 2 | -16/+23 |
2023-10-25 | target/sparc: Move gen_fop_DD insns to decodetree | Richard Henderson | 2 | -23/+30 |