| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2025-03-09 | target/rx: Move has_work() from CPUClass to SysemuCPUOps | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2025-03-09 | Merge tag 'pull-tcg-20250308' of https://gitlab.com/rth7680/qemu into staging | Stefan Hajnoczi | 1 | -1/+1 |
| 2025-03-08 | exec: Declare tlb_set_page() in 'exec/cputlb.h' | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2025-03-07 | target/rx: Remove TCG_CALL_NO_WG from helpers which write env | Keith Packard | 1 | -17/+17 |
| 2025-03-07 | target/rx: Set exception vector base to 0xffffff80 | Keith Packard | 1 | -1/+1 |
| 2025-03-06 | target: Set disassemble_info::endian value for little-endian targets | Philippe Mathieu-Daudé | 1 | -0/+1 |
| 2025-03-06 | target/rx: Ensure not being build on user emulation | Philippe Mathieu-Daudé | 3 | -12/+4 |
| 2025-03-06 | accel/tcg: Rename 'hw/core/tcg-cpu-ops.h' -> 'accel/tcg/cpu-ops.h' | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2025-02-11 | fpu: allow flushing of output denormals to be after rounding | Peter Maydell | 1 | -0/+8 |
| 2025-02-08 | target/*: Remove TARGET_LONG_BITS from cpu-param.h | Richard Henderson | 1 | -1/+0 |
| 2025-01-28 | fpu: Rename float_flag_output_denormal to float_flag_output_denormal_flushed | Peter Maydell | 1 | -1/+1 |
| 2025-01-28 | fpu: Rename float_flag_input_denormal to float_flag_input_denormal_flushed | Peter Maydell | 1 | -1/+1 |
| 2024-12-24 | accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core | Richard Henderson | 3 | -2/+5 |
| 2024-12-20 | accel/tcg: Include missing 'exec/translation-block.h' header | Philippe Mathieu-Daudé | 1 | -0/+1 |
| 2024-12-20 | accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h' | Philippe Mathieu-Daudé | 1 | -0/+1 |
| 2024-12-11 | target/rx: Set default NaN pattern explicitly | Peter Maydell | 1 | -0/+2 |
| 2024-11-05 | target/rx: Explicitly set 2-NaN propagation rule | Peter Maydell | 1 | -0/+7 |
| 2024-07-28 | target/rx: Use target_ulong for address in LI | Richard Henderson | 1 | -1/+2 |
| 2024-07-11 | target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation | Peter Maydell | 1 | -0/+1 |
| 2024-05-15 | target/rx: Use translator_ld* | Richard Henderson | 1 | -13/+14 |
| 2024-05-15 | accel/tcg: Provide default implementation of disas_log | Richard Henderson | 1 | -8/+0 |
| 2024-05-06 | accel/tcg: Access tcg_cflags with getter / setter | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2024-05-06 | exec/cpu: Extract page-protection definitions to page-protection.h | Philippe Mathieu-Daudé | 1 | -0/+1 |
| 2024-04-25 | hw, target: Add ResetType argument to hold and exit phase methods | Peter Maydell | 1 | -2/+2 |
| 2024-03-12 | target/rx: Prefer fast cpu_env() over slower CPU QOM cast macro | Philippe Mathieu-Daudé | 4 | -12/+7 |
| 2024-03-12 | target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handler | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2024-03-12 | bulk: Call in place single use cpu_env() | Philippe Mathieu-Daudé | 1 | -2/+1 |
| 2024-02-28 | gdbstub: Infer number of core registers from XML | Akihiko Odaki | 1 | -1/+0 |
| 2024-02-03 | include/exec: Implement cpu_mmu_index generically | Richard Henderson | 1 | -5/+0 |
| 2024-02-03 | target/rx: Populate CPUClass.mmu_index | Richard Henderson | 1 | -0/+6 |
| 2024-01-29 | include/qemu: Add TCGCPUOps typedef to typedefs.h | Richard Henderson | 1 | -1/+1 |
| 2024-01-29 | target: Use vaddr in gen_intermediate_code | Anton Johansson | 1 | -1/+1 |
| 2024-01-05 | target/rx: Use generic cpu_list() | Gavin Shan | 2 | -19/+0 |
| 2023-11-07 | hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() | Philippe Mathieu-Daudé | 1 | -5/+1 |
| 2023-11-07 | target: Move ArchCPUClass definition to 'cpu.h' | Philippe Mathieu-Daudé | 2 | -15/+14 |
| 2023-11-07 | target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h' | Philippe Mathieu-Daudé | 2 | -3/+4 |
| 2023-11-07 | target: Unify QOM style | Philippe Mathieu-Daudé | 2 | -4/+0 |
| 2023-10-22 | target/rx: Use tcg_gen_ext_i32 | Richard Henderson | 1 | -8/+3 |
| 2023-10-07 | meson: Rename target_softmmu_arch -> target_system_arch | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2023-10-04 | accel/tcg: Remove cpu_set_cpustate_pointers | Richard Henderson | 1 | -1/+0 |
| 2023-10-04 | accel/tcg: Replace CPUState.env_ptr with cpu_env() | Richard Henderson | 2 | -4/+1 |
| 2023-10-03 | tcg: Rename cpu_env to tcg_env | Richard Henderson | 1 | -28/+28 |
| 2023-10-03 | accel/tcg: Move CPUNegativeOffsetState into CPUState | Richard Henderson | 1 | -1/+0 |
| 2023-10-03 | target/*: Add instance_align to all cpu base classes | Richard Henderson | 1 | -0/+1 |
| 2023-08-24 | include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*() | Anton Johansson | 1 | -3/+3 |
| 2023-07-25 | other architectures: spelling fixes | Michael Tokarev | 1 | -2/+2 |
| 2023-06-26 | target: Widen pc/cs_base in cpu_get_tb_cpu_state | Anton Johansson | 1 | -2/+2 |
| 2023-06-05 | accel/tcg: Introduce translator_io_start | Richard Henderson | 1 | -2/+0 |
| 2023-06-05 | tcg: Pass TCGHelperInfo to tcg_gen_callN | Richard Henderson | 1 | -0/+5 |
| 2023-06-05 | target/*: Add missing includes of tcg/debug-assert.h | Richard Henderson | 2 | -0/+2 |
