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translate.c
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Author
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2019-02-11
RISC-V: Add misa.MAFD checks to translate
Michael Clark
1
-0
/
+158
2019-02-11
RISC-V: Add misa to DisasContext
Michael Clark
1
-35
/
+40
2019-02-11
RISC-V: Add priv_ver to DisasContext
Alistair Francis
1
-2
/
+5
2019-02-11
RISC-V: Mark mstatus.fs dirty
Richard Henderson
1
-1
/
+39
2019-02-11
RISC-V: Split out mstatus_fs from tb_flags
Richard Henderson
1
-5
/
+5
2018-11-13
RISC-V: Respect fences for user-only emulators
Palmer Dabbelt
1
-2
/
+0
2018-11-13
target/riscv: Fix sfence.vm/a both available in any priv version
Bastian Koppelmann
1
-5
/
+13
2018-11-13
target/riscv: Fix FCLASS_D being treated as RV64 only
Bastian Koppelmann
1
-1
/
+3
2018-09-05
target/riscv: call gen_goto_tb on DISAS_TOO_MANY
Emilio G. Cota
1
-6
/
+1
2018-09-05
target/riscv: optimize indirect branches
Emilio G. Cota
1
-1
/
+1
2018-09-05
target/riscv: optimize cross-page direct jumps in softmmu
Emilio G. Cota
1
-1
/
+1
2018-06-01
tcg: Pass tb and index to tcg_gen_exit_tb separately
Richard Henderson
1
-10
/
+10
2018-05-11
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180510'...
Peter Maydell
1
-49
/
+17
2018-05-10
target/riscv: Use new atomic min/max expanders
Richard Henderson
1
-49
/
+17
2018-05-09
target/riscv: convert to TranslatorOps
Emilio G. Cota
1
-78
/
+80
2018-05-09
target/riscv: convert to DisasContextBase
Emilio G. Cota
1
-65
/
+64
2018-05-09
target/riscv: convert to DisasJumpType
Emilio G. Cota
1
-44
/
+28
2018-05-09
target/riscv: avoid integer overflow in next_page PC check
Emilio G. Cota
1
-3
/
+3
2018-05-06
RISC-V: Add mcycle/minstret support for -icount auto
Michael Clark
1
-0
/
+2
2018-05-06
RISC-V: Remove erroneous comment from translate.c
Michael Clark
1
-1
/
+0
2018-03-07
RISC-V TCG Code Generation
Michael Clark
1
-0
/
+1978