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path: root/target/riscv/pmp.c
AgeCommit message (Expand)AuthorFilesLines
2024-05-06exec/cpu: Extract page-protection definitions to page-protection.hPhilippe Mathieu-Daudé1-0/+1
2024-01-10target/riscv: pmp: Ignore writes when RW=01 and MML=0Ivan Klokov1-1/+1
2024-01-10target/riscv/pmp: Use hwaddr instead of target_ulong for RV32Ivan Klokov1-14/+12
2023-11-07target/riscv: pmp: Ignore writes when RW=01Mayuresh Chitale1-0/+5
2023-11-07target/riscv: pmp: Clear pmp/smepmp bits on resetMayuresh Chitale1-0/+10
2023-11-07Add epmp to extensions list and rename it to smepmpHimanshu Chauhan1-6/+6
2023-09-11target/riscv/pmp.c: respect mseccfg.RLB for pmpaddrX changesLeon Schuermann1-0/+4
2023-06-13target/riscv: Smepmp: Return error when access permission not allowed in PMPHimanshu Chauhan1-8/+2
2023-06-13target/riscv: Deny access if access is partially inside the PMP entryWeiwei Li1-2/+2
2023-06-13target/riscv: Separate pmp_update_rule() in pmpcfg_csr_writeWeiwei Li1-14/+2
2023-06-13target/riscv: Flush TLB only when pmpcfg/pmpaddr really changesWeiwei Li1-10/+18
2023-06-13target/riscv: Flush TLB when pmpaddr is updatedWeiwei Li1-0/+1
2023-06-13target/riscv: Update the next rule addr in pmpaddr_csr_write()Weiwei Li1-3/+7
2023-06-13target/riscv: Flush TLB when MMWP or MML bits are changedWeiwei Li1-0/+3
2023-06-13target/riscv: Remove unused paramters in pmp_hart_has_privs_default()Weiwei Li1-6/+3
2023-06-13target/riscv: Make RLB/MML/MMWP bits writable only when Smepmp is enabledWeiwei Li1-24/+26
2023-06-13target/riscv: Change the return type of pmp_hart_has_privs() to boolWeiwei Li1-19/+13
2023-06-13target/riscv: Make the short cut really work in pmp_hart_has_privsWeiwei Li1-0/+1
2023-06-13target/riscv: Update pmp_get_tlb_size()Weiwei Li1-15/+54
2023-05-05target/riscv: Fix lines with over 80 charactersWeiwei Li1-2/+4
2023-05-05target/riscv: Fix format for commentsWeiwei Li1-19/+22
2023-05-05target/riscv: Fix format for indentationWeiwei Li1-9/+10
2023-03-01target/riscv: remove RISCV_FEATURE_MMUDaniel Henrique Barboza1-1/+1
2023-03-01target/riscv: remove RISCV_FEATURE_PMPDaniel Henrique Barboza1-1/+1
2023-03-01target/riscv: remove RISCV_FEATURE_EPMPDaniel Henrique Barboza1-2/+2
2023-02-23target/riscv: Smepmp: Skip applying default rules when address matchesHimanshu Chauhan1-3/+6
2023-01-06target/riscv: Fix PMP propagation for tlbLIU Zhiwei1-60/+30
2022-10-14target/riscv: pmp: Fixup TLB size calculationAlistair Francis1-0/+12
2022-07-03target/riscv/pmp: guard against PMP ranges with a negative sizeNicolas Pitre1-0/+3
2022-04-22target/riscv/pmp: fix NAPOT range computation overflowNicolas Pitre1-11/+3
2022-01-21target/riscv: Adjust pmpcfg access with mxlLIU Zhiwei1-8/+4
2021-07-15target/riscv: pmp: Fix some typosBin Meng1-5/+5
2021-06-08target/riscv/pmp: Add assert for ePMP operationsAlistair Francis1-0/+4
2021-05-11target/riscv/pmp: Remove outdated commentAlistair Francis1-4/+0
2021-05-11target/riscv: Implementation of enhanced PMP (ePMP)Hou Weiying1-8/+146
2021-05-11target/riscv: Add ePMP CSR access functionsHou Weiying1-0/+34
2021-05-11target/riscv: Fix the PMP is locked check when using TORAlistair Francis1-10/+16
2021-03-22target/riscv: flush TLB pages if PMP permission has been changedJim Shu1-0/+4
2021-03-22target/riscv: propagate PMP permission to TLB pageJim Shu1-21/+59
2021-01-16target/riscv/pmp: Raise exception if no PMP entry is configuredAtish Patra1-2/+2
2020-11-03target/riscv: Add PMP state descriptionYifei Jiang1-11/+18
2020-08-21target/riscv: Change the TLB page size depends on PMP entries.Zong Li1-0/+52
2020-08-21riscv: Fix bug in setting pmpcfg CSR for RISCV64Hou Weiying1-3/+2
2020-07-13target/riscv: Fix pmp NA4 implementationAlexandre Mergnat1-1/+1
2020-06-19target/riscv: Use a smaller guess size for no-MMU PMPAlistair Francis1-5/+9
2019-10-28target/riscv: PMP violation due to wrong size parameterDayeol Lee1-1/+12
2019-09-17target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace eventsPhilippe Mathieu-Daudé1-21/+10
2019-09-17target/riscv/pmp: Restrict priviledged PMP to system-mode emulationPhilippe Mathieu-Daudé1-4/+0
2019-06-23RISC-V: Fix a PMP bug where it succeeds even if PMP entry is offHesham Almatary1-4/+5
2019-06-23RISC-V: Check for the effective memory privilege mode during PMP checksHesham Almatary1-3/+3
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