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AgeCommit message (Expand)AuthorFilesLines
2022-03-14target/ppc: fix xxspltw for big endian hostsMatheus Ferst1-1/+1
2022-03-14target/ppc: fix ISI fault cause for Radix MMULeandro Lupori1-1/+2
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé1-1/+1
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé2-4/+1
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé2-3/+2
2022-03-05target/ppc: Add missing helper_reset_fpstatus to helper_XVCVSPBF16Víctor Colombo1-0/+2
2022-03-05target/ppc: Add missing helper_reset_fpstatus to VSX_MAX_MINCVíctor Colombo1-0/+2
2022-03-05target/ppc: split XXGENPCV macros for readabilityMatheus Ferst2-42/+57
2022-03-05target/ppc: use andc in vrlqmiMatheus Ferst1-4/+2
2022-03-05target/ppc: use extract/extract2 to create vrlqnm maskMatheus Ferst1-7/+3
2022-03-05target/ppc: use ext32u and deposit in do_vx_vmulhw_i64Matheus Ferst1-7/+3
2022-03-05target/ppc: Fix vmul[eo]* instructions marked 2.07Lucas Mateus Castro (alqotel)1-8/+8
2022-03-05target/ppc: change xs[n]madd[am]sp to use float64r32_muladdMatheus Ferst1-38/+20
2022-03-02target/ppc: implement lxvr[bhwd]/stxvr[bhwd]xLucas Coutinho2-0/+43
2022-03-02target/ppc: implement plxssp/pstxsspLeandro Lupori4-68/+62
2022-03-02target/ppc: implement plxsd/pstxsdLeandro Lupori4-14/+67
2022-03-02target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructionsVíctor Colombo4-4/+57
2022-03-02target/ppc: Implement xs{max,min}cqpVíctor Colombo4-0/+9
2022-03-02target/ppc: Refactor VSX_MAX_MINC helperVíctor Colombo1-24/+17
2022-03-02target/ppc: Move xs{max, min}[cj]dp to use do_helper_XX3Víctor Colombo3-34/+12
2022-03-02target/ppc: Move xscmp{eq,ge,gt}dp to decodetreeVíctor Colombo5-12/+34
2022-03-02target/ppc: Implement xscmp{eq,ge,gt}qpVíctor Colombo4-0/+40
2022-03-02target/ppc: Refactor VSX_SCALAR_CMP_DPVíctor Colombo1-35/+29
2022-03-02target/ppc: Remove xscmpnedp instructionVíctor Colombo4-4/+0
2022-03-02target/ppc: Implement xvtlsbb instructionVíctor Colombo2-0/+47
2022-03-02target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o]Matheus Ferst4-0/+80
2022-03-02target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetreeMatheus Ferst5-43/+90
2022-03-02target/ppc: Implement xxgenpcv[bhwd]m instructionMatheus Ferst4-0/+160
2022-03-02target/ppc: Implement xxevalMatheus Ferst4-0/+271
2022-03-02target/ppc: Implement xxpermx instructionMatheus Ferst4-0/+51
2022-03-02target/ppc: Move xxpermdi to decodetreeMatheus Ferst3-41/+36
2022-03-02target/ppc: move xxperm/xxpermr to decodetreeMatheus Ferst5-27/+45
2022-03-02target/ppc: Move xxsel to decodetreeMatheus Ferst4-67/+26
2022-03-02target/ppc: Move vsel and vperm/vpermr to decodetreeMatheus Ferst5-32/+62
2022-03-02target/ppc: implement vrlqmiMatheus Ferst2-4/+18
2022-03-02target/ppc: implement vrlqnmMatheus Ferst2-5/+77
2022-03-02target/ppc: implement vrlqMatheus Ferst2-0/+49
2022-03-02target/ppc: move vrl[bhwd]nm/vrl[bhwd]mi to decodetreeMatheus Ferst5-41/+184
2022-03-02target/ppc: move vrl[bhwd] to decodetreeMatheus Ferst3-12/+12
2022-03-02target/ppc: implement vsraqMatheus Ferst2-6/+18
2022-03-02target/ppc: implement vsrqMatheus Ferst2-10/+31
2022-03-02target/ppc: implement vslqMatheus Ferst2-0/+41
2022-03-02target/ppc: move vs[lr][a][bhwd] to decodetreeMatheus Ferst3-26/+45
2022-03-02target/ppc: implement vgnbMatheus Ferst2-0/+140
2022-03-02target/ppc: implement vcntmb[bhwd]Matheus Ferst2-0/+40
2022-03-02target/ppc: implement vclrrbMatheus Ferst2-8/+25
2022-03-02target/ppc: implement vclrlbMatheus Ferst2-0/+42
2022-03-02target/ppc: implement vstri[bh][lr]Matheus Ferst4-0/+72
2022-03-02target/ppc: Implement Vector Compare QuadwordMatheus Ferst2-0/+51
2022-03-02target/ppc: Implement Vector Compare Greater Than QuadwordMatheus Ferst2-0/+41