riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-04-26	target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'	Philippe Mathieu-Daudé	1	-2/+0
2024-02-03	include/exec: Implement cpu_mmu_index generically	Richard Henderson	1	-6/+0
2024-02-03	target/openrisc: Populate CPUClass.mmu_index	Richard Henderson	1	-8/+2
2024-01-05	target/openrisc: Use generic cpu_list()	Gavin Shan	1	-3/+0
2023-11-07	target/openrisc: Declare QOM definitions in 'cpu-qom.h'	Philippe Mathieu-Daudé	1	-9/+1
2023-11-07	target: Unify QOM style	Philippe Mathieu-Daudé	1	-4/+0
2023-10-03	accel/tcg: Move CPUNegativeOffsetState into CPUState	Richard Henderson	1	-1/+0
2023-07-25	other architectures: spelling fixes	Michael Tokarev	1	-1/+1
2023-06-26	target: Widen pc/cs_base in cpu_get_tb_cpu_state	Anton Johansson	1	-3/+2
2023-02-27	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	Philippe Mathieu-Daudé	1	-1/+2
2022-12-16	target/openrisc: Convert to 3-phase reset	Peter Maydell	1	-2/+2
2022-09-04	target/openrisc: Enable MTTCG	Stafford Horne	1	-0/+2
2022-04-06	Move CPU softfloat unions to cpu-float.h	Marc-André Lureau	1	-0/+1
2022-03-06	target: Use ArchCPU as interface to target CPU	Philippe Mathieu-Daudé	1	-1/+1
2022-03-06	target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro	Philippe Mathieu-Daudé	1	-7/+1
2022-03-06	target: Use CPUArchState as interface to target-specific CPU state	Philippe Mathieu-Daudé	1	-2/+1
2022-03-06	target: Use forward declared type instead of structure type	Philippe Mathieu-Daudé	1	-2/+2
2021-11-02	target/openrisc: Make openrisc_cpu_tlb_fill sysemu only	Richard Henderson	1	-3/+4
2021-09-21	include/exec: Move cpu_signal_handler declaration	Richard Henderson	1	-2/+0
2021-09-14	target/openrisc: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	1	-2/+3
2020-12-15	target/openrisc: Move pic_cpu code into CPU object proper	Peter Maydell	1	-1/+0
2020-09-18	qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros	Eduardo Habkost	1	-1/+1
2020-09-09	Use OBJECT_DECLARE_TYPE where possible	Eduardo Habkost	1	-4/+2
2020-09-09	Use DECLARE_CHECKER macros	Eduardo Habkost	1	-6/+2
2020-09-09	Move QOM typedefs and add missing includes	Eduardo Habkost	1	-4/+7
2020-03-19	Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...	Peter Maydell	1	-1/+1
2020-03-17	cpu: Use DeviceClass reset instead of a special CPUClass reset	Peter Maydell	1	-1/+1
2020-03-17	gdbstub: extend GByteArray to read register helpers	Alex Bennée	1	-1/+1
2019-09-04	target/openrisc: Implement move to/from FPCSR	Richard Henderson	1	-0/+2
2019-09-04	target/openrisc: Add VR2 and AVR special processor registers	Richard Henderson	1	-4/+7
2019-09-04	target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init	Richard Henderson	1	-4/+4
2019-09-04	target/openrisc: Make VR and PPC read-only	Richard Henderson	1	-3/+0
2019-08-21	hw/core: Move cpu.c, cpu.h from qom/ to hw/core/	Markus Armbruster	1	-1/+1
2019-08-16	migration: Move the VMStateDescription typedef to typedefs.h	Markus Armbruster	1	-1/+1
2019-06-12	Include qemu-common.h exactly where needed	Markus Armbruster	1	-1/+0
2019-06-10	cpu: Remove CPU_COMMON	Richard Henderson	1	-2/+0
2019-06-10	cpu: Introduce CPUNegativeOffsetState	Richard Henderson	1	-1/+1
2019-06-10	cpu: Move ENV_OFFSET to exec/gen-icount.h	Richard Henderson	1	-1/+0
2019-06-10	target/openrisc: Use env_cpu, env_archcpu	Richard Henderson	1	-5/+0
2019-06-10	cpu: Replace ENV_GET_CPU with env_cpu	Richard Henderson	1	-2/+0
2019-06-10	cpu: Define ArchCPU	Richard Henderson	1	-0/+1
2019-06-10	cpu: Define CPUArchState with typedef	Richard Henderson	1	-2/+2
2019-06-10	tcg: Split out target/arch/cpu-param.h	Richard Henderson	1	-11/+3
2019-05-10	target/openrisc: Convert to CPUClass::tlb_fill	Richard Henderson	1	-2/+3
2019-05-08	target/openrisc: Fix LGPL information in the file headers	Thomas Huth	1	-1/+1
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster	1	-2/+1
2019-04-18	target: Simplify how the TARGET_cpu_list() print	Markus Armbruster	1	-1/+1
2018-07-03	target/openrisc: Reorg tlb lookup	Richard Henderson	1	-8/+0
2018-07-03	target/openrisc: Increase the TLB size	Richard Henderson	1	-1/+1
2018-07-03	target/openrisc: Use identical sizes for ITLB and DTLB	Richard Henderson	1	-6/+4