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AgeCommit message (Expand)AuthorFilesLines
2021-05-02target/mips: Move TCG source files under tcg/ sub directoryPhilippe Mathieu-Daudé25-43/+41
2021-05-02target/mips: Move CP0 helpers to sysemu/cp0.cPhilippe Mathieu-Daudé4-107/+129
2021-05-02target/mips: Move exception management code to exception.cPhilippe Mathieu-Daudé6-163/+182
2021-05-02target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.cPhilippe Mathieu-Daudé5-350/+340
2021-05-02target/mips: Move helper_cache() to tcg/sysemu/special_helper.cPhilippe Mathieu-Daudé5-37/+47
2021-05-02target/mips: Move Special opcodes to tcg/sysemu/special_helper.cPhilippe Mathieu-Daudé7-122/+151
2021-05-02target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scopePhilippe Mathieu-Daudé2-12/+7
2021-05-02target/mips: Move tlb_helper.c to tcg/sysemu/Philippe Mathieu-Daudé5-9/+6
2021-05-02target/mips: Restrict mmu_init() to TCGPhilippe Mathieu-Daudé3-4/+3
2021-05-02target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolderPhilippe Mathieu-Daudé7-167/+179
2021-05-02target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCGPhilippe Mathieu-Daudé2-4/+9
2021-05-02target/mips: Move physical addressing code to sysemu/physaddr.cPhilippe Mathieu-Daudé4-255/+282
2021-05-02target/mips: Move sysemu specific files under sysemu/ subfolderPhilippe Mathieu-Daudé5-6/+11
2021-05-02target/mips: Move cpu_signal_handler definition aroundPhilippe Mathieu-Daudé1-5/+4
2021-05-02target/mips: Add simple user-mode mips_cpu_tlb_fill()Philippe Mathieu-Daudé2-10/+36
2021-05-02target/mips: Add simple user-mode mips_cpu_do_interrupt()Philippe Mathieu-Daudé5-5/+39
2021-05-02target/mips: Introduce tcg-internal.h for TCG specific declarationsPhilippe Mathieu-Daudé2-4/+23
2021-05-02target/mips: Extract load/store helpers to ldst_helper.cPhilippe Mathieu-Daudé3-259/+289
2021-05-02target/mips: Merge do_translate_address into cpu_mips_translate_addressPhilippe Mathieu-Daudé3-24/+9
2021-05-02target/mips: Declare mips_env_set_pc() inlined in "internal.h"Philippe Mathieu-Daudé3-20/+14
2021-05-02target/mips: Turn printfpr() macro into a proper functionPhilippe Mathieu-Daudé1-27/+23
2021-05-02target/mips: Restrict mips_cpu_dump_state() to cpu.cPhilippe Mathieu-Daudé3-78/+77
2021-05-02target/mips: Optimize CPU/FPU regnames[] arraysPhilippe Mathieu-Daudé3-4/+4
2021-05-02target/mips: Make CPU/FPU regnames[] arrays globalPhilippe Mathieu-Daudé4-14/+17
2021-05-02target/mips: Move msa_reset() to new source filePhilippe Mathieu-Daudé3-36/+61
2021-05-02target/mips: Move IEEE rounding mode array to new source filePhilippe Mathieu-Daudé3-8/+19
2021-05-02target/mips: Simplify meson TCG rulesPhilippe Mathieu-Daudé1-3/+2
2021-05-02target/mips: Make check_cp0_enabled() return a booleanPhilippe Mathieu-Daudé2-2/+9
2021-05-02target/mips: Migrate missing CPU fieldsPhilippe Mathieu-Daudé1-6/+15
2021-05-02target/mips: Remove spurious LOG_UNIMP of MTHC0 opcodePhilippe Mathieu-Daudé1-0/+1
2021-05-02target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodesPhilippe Mathieu-Daudé1-0/+2
2021-05-02target/mips: Fix CACHEE opcode (CACHE using EVA addressing)Philippe Mathieu-Daudé1-1/+3
2021-04-20target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later)Philippe Mathieu-Daudé1-5/+4
2021-04-13target/mips: Fix TCG temporary leak in gen_cache_operation()Philippe Mathieu-Daudé1-0/+2
2021-03-22target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAXPeter Maydell1-4/+4
2021-03-13target/mips/tx79: Salvage instructions description commentPhilippe Mathieu-Daudé2-160/+188
2021-03-13target/mips: Remove 'C790 Multimedia Instructions' dead codePhilippe Mathieu-Daudé1-371/+0
2021-03-13target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetreePhilippe Mathieu-Daudé3-80/+48
2021-03-13target/mips/tx79: Move PCPYH opcode to decodetreePhilippe Mathieu-Daudé3-39/+27
2021-03-13target/mips/translate: Simplify PCPYH using deposit_i64()Philippe Mathieu-Daudé1-30/+4
2021-03-13target/mips/translate: Make gen_rdhwr() publicPhilippe Mathieu-Daudé2-1/+3
2021-03-13target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetreePhilippe Mathieu-Daudé3-25/+17
2021-03-13target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetreePhilippe Mathieu-Daudé6-12/+94
2021-03-13target/mips: Use gen_load_gpr[_hi]() when possiblePhilippe Mathieu-Daudé1-23/+6
2021-03-13target/mips: Extract MXU code to new mxu_translate.c filePhilippe Mathieu-Daudé3-1605/+1613
2021-03-13target/mips: Introduce mxu_translate_init() helperPhilippe Mathieu-Daudé2-12/+17
2021-03-13target/mips: Simplify decode_opc_mxu() ifdef'ryPhilippe Mathieu-Daudé2-4/+5
2021-03-13target/mips: Convert decode_ase_mxu() to decodetree prototypePhilippe Mathieu-Daudé1-3/+5
2021-03-13target/mips: Rename decode_opc_mxu() as decode_ase_mxu()Philippe Mathieu-Daudé1-2/+2
2021-03-13target/mips: Move MUL opcode check from decode_mxu() to decode_legacy()Philippe Mathieu-Daudé1-14/+5