riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-06-12	Include qemu-common.h exactly where needed	Markus Armbruster	1	-1/+0
2019-06-10	cpu: Remove CPU_COMMON	Richard Henderson	1	-2/+0
2019-06-10	cpu: Introduce CPUNegativeOffsetState	Richard Henderson	1	-0/+1
2019-06-10	cpu: Move ENV_OFFSET to exec/gen-icount.h	Richard Henderson	1	-1/+0
2019-06-10	target/mips: Use env_cpu, env_archcpu	Richard Henderson	1	-5/+0
2019-06-10	cpu: Replace ENV_GET_CPU with env_cpu	Richard Henderson	1	-2/+0
2019-06-10	cpu: Define ArchCPU	Richard Henderson	1	-0/+1
2019-06-10	cpu: Define CPUArchState with typedef	Richard Henderson	1	-4/+2
2019-06-10	tcg: Split out target/arch/cpu-param.h	Richard Henderson	1	-2/+1
2019-05-26	target/mips: realign comments to fix checkpatch warnings	Jules Irenge	1	-12/+22
2019-05-26	target/mips: add or remove space to fix checkpatch errors	Jules Irenge	1	-81/+94
2019-04-18	target: Simplify how the TARGET_cpu_list() print	Markus Armbruster	1	-1/+1
2019-02-14	target/mips: introduce MTTCG-enabled builds	Aleksandar Markovic	1	-0/+2
2019-02-14	target/mips: reimplement SC instruction emulation and use cmpxchg	Leon Alrae	1	-4/+0
2019-02-14	target/mips: compare virtual addresses in LL/SC sequence	Leon Alrae	1	-1/+2
2019-01-24	target/mips: Correct the second argument type of cpu_supports_isa()	Aleksandar Markovic	1	-1/+1
2019-01-18	target/mips: Introduce 32 R5900 multimedia registers	Fredrik Noring	1	-0/+3
2019-01-18	target/mips: Add CP0 register MemoryMapID	Aleksandar Markovic	1	-0/+1
2019-01-18	target/mips: Amend preprocessor constants for CP0 registers	Aleksandar Markovic	1	-32/+146
2019-01-18	target/mips: Update ITU to utilize SAARI and SAAR CP0 registers	Yongbok Kim	1	-0/+5
2019-01-18	target/mips: Provide R/W access to SAARI and SAAR CP0 registers	Yongbok Kim	1	-0/+1
2019-01-18	target/mips: Add fields for SAARI and SAAR CP0 registers	Yongbok Kim	1	-2/+8
2019-01-18	target/mips: Add preprocessor constants for 32 major CP0 registers	Aleksandar Markovic	1	-0/+32
2019-01-18	target/mips: Move comment containing summary of CP0 registers	Aleksandar Markovic	1	-81/+84
2018-10-29	target/mips: Introduce MXU registers	Craig Janeczek	1	-0/+10
2018-10-18	target/mips: Add CP0 PWCtl register	Yongbok Kim	1	-0/+11
2018-10-18	target/mips: Add CP0 PWSize register	Yongbok Kim	1	-0/+10
2018-10-18	target/mips: Add CP0 PWField register	Yongbok Kim	1	-0/+15
2018-10-18	target/mips: Add CP0 PWBase register	Yongbok Kim	1	-0/+1
2018-10-18	target/mips: Improve DSP R2/R3-related naming	Stefan Markovic	1	-3/+3
2018-10-18	target/mips: Add bit definitions for DSP R3 ASE	Stefan Markovic	1	-0/+1
2018-10-18	target/mips: Increase 'supported ISAs/ASEs' flag holder size	Philippe Mathieu-Daudé	1	-1/+1
2018-10-18	target/mips: Add a comment before each CP0 register section in cpu.h	Aleksandar Markovic	1	-0/+88
2018-10-18	target/mips: Add a comment with an overview of CP0 registers	Aleksandar Markovic	1	-0/+109
2018-08-24	target/mips: Implement emulation of nanoMIPS LLWP/SCWP pair	Aleksandar Rikalo	1	-0/+2
2018-08-16	target/mips: Add CP0 BadInstrX register	Stefan Markovic	1	-0/+1
2018-08-16	target/mips: Update some CP0 registers bit definitions	Aleksandar Markovic	1	-69/+88
2018-03-19	cpu: get rid of unused cpu_init() defines	Igor Mammedov	1	-2/+0
2018-03-19	cpu: add CPU_RESOLVING_TYPE macro	Igor Mammedov	1	-0/+1
2017-10-27	mips: malta/boston: replace cpu_model with cpu_type	Igor Mammedov	1	-2/+6
2017-09-21	mips: replace cpu_mips_init() with cpu_generic_init()	Igor Mammedov	1	-2/+1
2017-09-21	mips: introduce internal.h and cleanup cpu.h	Philippe Mathieu-Daudé	1	-353/+1
2017-07-20	target/mips: Add segmentation control registers	James Hogan	1	-0/+30
2017-07-20	target/mips: Add an MMU mode for ERL	James Hogan	1	-4/+13
2017-07-20	target/mips: Abstract mmu_idx from hflags	James Hogan	1	-1/+7
2017-07-20	target/mips: Add CP0_Ebase.WG (write gate) support	James Hogan	1	-1/+4
2017-02-21	target-mips: Provide function to test if a CPU supports an ISA	Paul Burton	1	-0/+1
2017-01-13	cputlb: drop flush_global flag from tlb_flush	Alex Bennée	1	-1/+1
2017-01-13	qom/cpu: move tlb_flush to cpu_common_reset	Alex Bennée	1	-0/+3
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth	1	-0/+1069