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path: root/target/loongarch/tlb_helper.c
AgeCommit message (Expand)AuthorFilesLines
2024-01-06target/loongarch: move translate modules to tcg/Song Gao1-803/+0
2023-11-03target/loongarch: Support 4K page sizeSong Gao1-5/+4
2023-08-24target/loongarch: Support LoongArch32 VPPNJiajie Chen1-5/+18
2023-08-24target/loongarch: Support LoongArch32 DMWJiajie Chen1-3/+23
2023-08-24target/loongarch: Support LoongArch32 TLB entryJiajie Chen1-5/+12
2023-06-16target/loongarch: Fix CSR.DMW0-3.VSEG checkJiajie Chen1-2/+2
2023-01-18bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plxPhilippe Mathieu-Daudé1-1/+1
2022-11-07target/loongarch: Separate the hardware flags into MMU index and PLVRui Wang1-2/+2
2022-11-04target/loongarch: Fix raise_mmu_exception() set wrong exception_indexSong Gao1-2/+3
2022-07-19target/loongarch/tlb_helper: Fix coverity integer overflow errorXiaojuan Yang1-2/+2
2022-06-06target/loongarch: Add other core instructions supportXiaojuan Yang1-0/+93
2022-06-06target/loongarch: Add TLB instruction supportXiaojuan Yang1-0/+355
2022-06-06target/loongarch: Add MMU support for LoongArch CPU.Xiaojuan Yang1-0/+315
generated by cgit v1.1 at 2024-08-19 09:28:36 +0000