riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-01-06	target/loongarch: move translate modules to tcg/	Song Gao	1	-498/+0
2023-10-03	tcg: Rename cpu_env to tcg_env	Richard Henderson	1	-26/+26
2023-08-24	target/loongarch: Add avail_IOCSR to check iocsr instructions	Song Gao	1	-8/+8
2023-08-24	target/loongarch: Add avail_LSPW to check LSPW instructions	Song Gao	1	-0/+8
2023-08-24	target/loongarch: Add a check parameter to the TRANS macro	Song Gao	1	-8/+8
2023-07-24	target/loongarch: Fix the CSRRD CPUID instruction on big endian hosts	Thomas Huth	1	-7/+1
2023-06-05	accel/tcg: Introduce translator_io_start	Richard Henderson	1	-3/+1
2023-03-05	target/loongarch: Drop tcg_temp_free	Richard Henderson	1	-4/+0
2023-03-05	target/loongarch: Drop temp_new	Richard Henderson	1	-1/+1
2022-11-07	target/loongarch: Separate the hardware flags into MMU index and PLV	Rui Wang	1	-2/+2
2022-11-04	target/loongarch: Adjust the layout of hardware flags bit fields	Rui Wang	1	-1/+1
2022-07-04	target/loongarch: Adjust functions and structure to support user-mode	Song Gao	1	-0/+36
2022-06-06	target/loongarch: Add other core instructions support	Xiaojuan Yang	1	-0/+65
2022-06-06	target/loongarch: Add TLB instruction support	Xiaojuan Yang	1	-0/+102
2022-06-06	target/loongarch: Add LoongArch IOCSR instruction	Xiaojuan Yang	1	-0/+35
2022-06-06	target/loongarch: Add LoongArch CSR instruction	Xiaojuan Yang	1	-0/+264