aboutsummaryrefslogtreecommitdiff
path: root/target/i386
AgeCommit message (Expand)AuthorFilesLines
2018-06-29Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell9-40/+186
2018-06-29i386/cpu: make -cpu host support monitor/mwaitMichael S. Tsirkin3-10/+40
2018-06-28kvm: support -overcommit cpu-pm=on|offMichael S. Tsirkin1-0/+23
2018-06-28hmp: obsolete "info ioapic"Peter Xu1-6/+2
2018-06-28target-i386: Mark cpu_vmexit noreturnJan Kiszka2-2/+3
2018-06-28target-i386: Allow interrupt injection after STGIJan Kiszka1-1/+2
2018-06-28target-i386: Add NMI interception to SVMJan Kiszka1-0/+1
2018-06-28WHPX: register for unrecognized MSR exitsJustin Terry (VM)1-3/+38
2018-06-28WHPX workaround bug in OSVW handlingJustin Terry (VM)1-1/+12
2018-06-28whpx: commit missing filePaolo Bonzini1-0/+56
2018-06-28target/i386: Fix BLSR and BLSIRichard Henderson1-17/+9
2018-06-27compiler: add a sizeof_field() macroStefan Hajnoczi1-1/+1
2018-06-22i386: Remove generic SMT thread checkBabu Moger1-6/+11
2018-06-22i386: Enable TOPOEXT feature on AMD EPYC CPUBabu Moger1-4/+6
2018-06-22i386: Fix up the Node id for CPUID_8000_001EBabu Moger1-1/+25
2018-06-22i386: Allow TOPOEXT to be enabled on older kernelsBabu Moger1-0/+7
2018-06-22i386: Define AMD's no SSB mitigation needed.Konrad Rzeszutek Wilk1-1/+1
2018-06-22i386: define the AMD 'amd-ssbd' CPUID feature bitKonrad Rzeszutek Wilk1-1/+1
2018-06-22i386: Remove ospke CPUID flag nameEduardo Habkost1-2/+3
2018-06-22i386: Remove osxsave CPUID flag nameEduardo Habkost1-1/+1
2018-06-22i386: display known CPUID features linewrapped, in alphabetical orderDaniel P. Berrangé1-14/+27
2018-06-22i386: improve sorting of CPU model namesDaniel P. Berrangé1-5/+9
2018-06-22i386: improve alignment of CPU model listingDaniel P. Berrangé1-1/+1
2018-06-22i386: Add support for CPUID_8000_001E for AMDBabu Moger1-0/+86
2018-06-08i386: Populate AMD Processor Cache Information for cpuid 0x8000001DBabu Moger2-3/+143
2018-06-08i386: Clean up cache CPUID codeEduardo Habkost2-64/+67
2018-06-04Merge remote-tracking branch 'remotes/rth/tags/tcg-next-pull-request' into st...Peter Maydell1-4/+4
2018-06-01tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson1-4/+4
2018-06-01target/i386/kvm.c: Remove compatibility shim for KVM_HINTS_REALTIMEPeter Maydell1-5/+0
2018-06-01target/i386/kvm.c: Handle renaming of KVM_HINTS_DEDICATEDPeter Maydell1-1/+6
2018-06-01WHPX: fix some compiler warningsLucian Petrut1-14/+35
2018-06-01WHPX: dynamically load WHP librariesLucian Petrut1-68/+144
2018-06-01target: Do not include "exec/exec-all.h" if it is not necessaryPhilippe Mathieu-Daudé6-6/+0
2018-05-31target/i386: Do not include "exec/ioport.h" if it is not necessaryPhilippe Mathieu-Daudé4-4/+0
2018-05-31target: Do not include "exec/address-spaces.h" if it is not necessaryPhilippe Mathieu-Daudé1-1/+0
2018-05-23x86/cpu: use standard-headers/asm-x86.kvm_para.hMichael S. Tsirkin4-13/+3
2018-05-21i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639)Konrad Rzeszutek Wilk1-1/+1
2018-05-21i386: Define the Virt SSBD MSR and handling of it (CVE-2018-3639)Konrad Rzeszutek Wilk3-2/+36
2018-05-21i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639)Daniel P. Berrangé2-1/+2
2018-05-20Remove unnecessary variables for function return valueLaurent Vivier1-7/+3
2018-05-20tcg: fix s/compliment/complement/ typosEmilio G. Cota1-1/+1
2018-05-15i386: Add new property to control cache infoBabu Moger2-26/+76
2018-05-15i386: Initialize cache information for EPYC family processorsBabu Moger1-0/+52
2018-05-15i386: Add cache information in X86CPUDefinitionBabu Moger2-0/+8
2018-05-15i386: Helpers to encode cache information consistentlyEduardo Habkost2-124/+424
2018-05-15x86/cpu: Enable CLDEMOTE(Demote Cache Line) cpu featureJingqi Liu2-1/+2
2018-05-15i386: add KnightsMill cpu modelBoqun Feng1-0/+42
2018-05-14Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell6-18/+94
2018-05-11i386/kvm: add support for Hyper-V reenlightenment MSRsVitaly Kuznetsov5-3/+77
2018-05-09translator: merge max_insns into DisasContextBaseEmilio G. Cota1-4/+1