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author | Emilio G. Cota <cota@braap.org> | 2018-03-05 17:13:30 -0500 |
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committer | Michael Tokarev <mjt@tls.msk.ru> | 2018-05-20 08:25:23 +0300 |
commit | 1d349821551c2da4dfefe36c6ac17319f33ebbd5 (patch) | |
tree | fc5557b4604e8bab2bbf178345a1867c024fc9bc /target/i386 | |
parent | 5bcf917ee37a5efbef99f091a96db54a5276becb (diff) | |
download | qemu-1d349821551c2da4dfefe36c6ac17319f33ebbd5.zip qemu-1d349821551c2da4dfefe36c6ac17319f33ebbd5.tar.gz qemu-1d349821551c2da4dfefe36c6ac17319f33ebbd5.tar.bz2 |
tcg: fix s/compliment/complement/ typos
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target/i386')
-rw-r--r-- | target/i386/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/i386/translate.c b/target/i386/translate.c index b0f6983..7c21814 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -113,7 +113,7 @@ typedef struct DisasContext { int rex_x, rex_b; #endif int vex_l; /* vex vector length */ - int vex_v; /* vex vvvv register, without 1's compliment. */ + int vex_v; /* vex vvvv register, without 1's complement. */ int ss32; /* 32 bit stack segment */ CCOp cc_op; /* current CC operation */ bool cc_op_dirty; |