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target
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i386
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tcg
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decode-new.c.inc
Age
Commit message (
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)
Author
Files
Lines
2024-10-31
target/i386: Wrap cc_op_live with a validity check
Richard Henderson
1
-1
/
+1
2024-10-30
target/i386: fix CPUID check for LFENCE and SFENCE
Paolo Bonzini
1
-2
/
+2
2024-10-17
target/i386: Use only 16 and 32-bit operands for IN/OUT
Richard Henderson
1
-4
/
+4
2024-10-17
target/i386: list instructions still in translate.c
Paolo Bonzini
1
-0
/
+31
2024-10-17
target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder
Paolo Bonzini
1
-10
/
+24
2024-10-17
target/i386: decode address before going back to translate.c
Paolo Bonzini
1
-25
/
+28
2024-10-17
target/i386: convert bit test instructions to new decoder
Paolo Bonzini
1
-10
/
+31
2024-08-13
target/i386: Use unit not type in decode_modrm
Richard Henderson
1
-4
/
+4
2024-08-13
target/i386: Do not apply REX to MMX operands
Richard Henderson
1
-1
/
+4
2024-08-05
target/i386: Fix VSIB decode
Richard Henderson
1
-1
/
+2
2024-07-16
target/i386/tcg: fix POP to memory in long mode
Paolo Bonzini
1
-1
/
+1
2024-06-17
target/i386: convert CMPXCHG to new decoder
Paolo Bonzini
1
-1
/
+2
2024-06-17
target/i386: convert XADD to new decoder
Paolo Bonzini
1
-1
/
+2
2024-06-17
target/i386: convert LZCNT/TZCNT/BSF/BSR/POPCNT to new decoder
Paolo Bonzini
1
-2
/
+50
2024-06-17
target/i386: convert SHLD/SHRD to new decoder
Paolo Bonzini
1
-2
/
+6
2024-06-17
target/i386: convert non-grouped, helper-based 2-byte opcodes
Paolo Bonzini
1
-12
/
+36
2024-06-17
target/i386: split X86_CHECK_prot into PE and VM86 checks
Paolo Bonzini
1
-2
/
+7
2024-06-17
target/i386: finish converting 0F AE to the new decoder
Paolo Bonzini
1
-6
/
+42
2024-06-17
target/i386: fix bad sorting of entries in the 0F table
Paolo Bonzini
1
-47
/
+46
2024-06-17
target/i386: convert MOV from/to CR and DR to new decoder
Paolo Bonzini
1
-3
/
+58
2024-06-11
target/i386: fix processing of intercept 0 (read CR0)
Paolo Bonzini
1
-2
/
+2
2024-06-11
target/i386: replace NoSeg special with NoLoadEA
Paolo Bonzini
1
-8
/
+4
2024-06-11
target/i386: change X86_ENTRYwr to use T0, use it for moves
Paolo Bonzini
1
-24
/
+24
2024-06-11
target/i386: change X86_ENTRYr to use T0
Paolo Bonzini
1
-3
/
+3
2024-06-11
target/i386: put BLS* input in T1, use generic flag writeback
Paolo Bonzini
1
-2
/
+2
2024-06-11
target/i386: remove CPUX86State argument from generator functions
Paolo Bonzini
1
-2
/
+2
2024-06-08
target/i386: cleanup PAUSE helpers
Paolo Bonzini
1
-1
/
+14
2024-06-08
target/i386: cleanup HLT helpers
Paolo Bonzini
1
-2
/
+2
2024-06-05
target/i386: fix memory opsize for Mov to/from Seg
Xinyu Li
1
-2
/
+11
2024-06-05
target/i386: fix SSE and SSE2 feature check
Xinyu Li
1
-2
/
+2
2024-05-22
target/i386: clean up AAM/AAD
Paolo Bonzini
1
-2
/
+2
2024-05-10
target/i386: move prefetch and multi-byte UD/NOP to new decoder
Paolo Bonzini
1
-3
/
+21
2024-05-07
target/i386: remove duplicate prefix decoding
Paolo Bonzini
1
-12
/
+51
2024-05-07
target/i386: remove now-converted opcodes from old decoder
Paolo Bonzini
1
-3
/
+0
2024-05-07
target/i386: port extensions of one-byte opcodes to new decoder
Paolo Bonzini
1
-0
/
+20
2024-05-07
target/i386: move BSWAP to new decoder
Paolo Bonzini
1
-0
/
+9
2024-05-07
target/i386: move remaining conditional operations to new decoder
Paolo Bonzini
1
-0
/
+56
2024-05-07
target/i386: move C0-FF opcodes to new decoder (except for x87)
Paolo Bonzini
1
-0
/
+153
2024-05-07
target/i386: move 60-BF opcodes to new decoder
Paolo Bonzini
1
-0
/
+185
2024-05-07
target/i386: allow instructions with more than one immediate
Paolo Bonzini
1
-1
/
+1
2024-05-07
target/i386: move 00-5F opcodes to new decoder
Paolo Bonzini
1
-0
/
+120
2024-05-07
target/i386: reintroduce debugging mechanism
Paolo Bonzini
1
-0
/
+3
2023-12-29
target/i386: implement CMPccXADD
Paolo Bonzini
1
-0
/
+25
2023-12-29
target/i386: introduce flags writeback mechanism
Paolo Bonzini
1
-0
/
+34
2023-12-29
target/i386: adjust decoding of J operand
Paolo Bonzini
1
-10
/
+0
2023-12-29
target/i386: do not decode string source/destination into decode->mem
Paolo Bonzini
1
-18
/
+2
2023-12-29
target/i386: add X86_SPECIALs for MOVSX and MOVZX
Paolo Bonzini
1
-5
/
+13
2023-12-29
target/i386: rename zext0/zext2 and make them closer to the manual
Paolo Bonzini
1
-8
/
+8
2023-12-29
target/i386: reimplement check for validity of LOCK prefix
Paolo Bonzini
1
-7
/
+10
2023-12-29
target/i386: document more deviations from the manual
Paolo Bonzini
1
-0
/
+12
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