riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-03-05	target/avr: Drop tcg_temp_free	Richard Henderson	1	-228/+0
2023-03-05	target/avr: Drop R from trans_COM	Richard Henderson	1	-4/+0
2023-03-05	target/avr: Drop DisasContext.free_skip_var0	Richard Henderson	1	-19/+0
2023-03-01	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	Richard Henderson	1	-1/+1
2023-03-01	target/avr: Replace `tb_pc()` with `tb->pc`	Anton Johansson	1	-1/+2
2022-12-16	target/avr: Convert to 3-phase reset	Peter Maydell	2	-6/+11
2022-12-14	cleanup: Tweak and re-run return_directly.cocci	Markus Armbruster	1	-3/+1
2022-10-26	target/avr: Convert to tcg_ops restore_state_to_opc	Richard Henderson	2	-6/+11
2022-10-04	accel/tcg: Introduce tb_pc and log_pc	Richard Henderson	1	-1/+1
2022-10-04	hw/core: Add CPUClass.get_pc	Richard Henderson	1	-0/+8
2022-09-06	accel/tcg: Add pc and host_pc params to gen_intermediate_code	Richard Henderson	1	-2/+3
2022-09-01	target/avr: Disable interrupts when env->skip set	Richard Henderson	2	-4/+31
2022-09-01	target/avr: Only execute one interrupt at a time	Richard Henderson	1	-6/+3
2022-09-01	target/avr: Call avr_cpu_do_interrupt directly	Richard Henderson	1	-3/+2
2022-09-01	target/avr: Support probe argument to tlb_fill	Richard Henderson	1	-17/+29
2022-06-20	target/avr: Drop avr_cpu_memory_rw_debug()	Bin Meng	3	-9/+0
2022-05-11	Clean up decorations and whitespace around header guards	Markus Armbruster	1	-1/+1
2022-05-11	Clean up header guards that don't match their file name	Markus Armbruster	1	-3/+3
2022-04-20	exec/translator: Pass the locked filepointer to disas_log hook	Richard Henderson	1	-3/+4
2022-03-06	target: Use ArchCPU as interface to target CPU	Philippe Mathieu-Daudé	1	-1/+1
2022-03-06	target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro	Philippe Mathieu-Daudé	2	-6/+3
2022-03-06	target: Use CPUArchState as interface to target-specific CPU state	Philippe Mathieu-Daudé	1	-5/+2
2022-02-22	Merge remote-tracking branch 'remotes/lvivier-gitlab/tags/trivial-branch-for-...	Peter Maydell	1	-1/+0
2022-02-21	target/avr: Correct AVRCPUClass docstring	Philippe Mathieu-Daudé	1	-1/+0
2022-02-21	exec/exec-all: Move 'qemu/log.h' include in units requiring it	Philippe Mathieu-Daudé	1	-0/+1
2021-10-15	target/avr: Drop checks for singlestep_enabled	Richard Henderson	1	-15/+4
2021-09-21	include/exec: Move cpu_signal_handler declaration	Richard Henderson	1	-2/+0
2021-09-16	Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.2-pul...	Peter Maydell	1	-5/+3
2021-09-16	target/avr: Fix compiler errors (-Werror=enum-conversion)	Stefan Weil	1	-5/+3
2021-09-14	target/avr: Remove pointless use of CONFIG_USER_ONLY definition	Philippe Mathieu-Daudé	1	-3/+0
2021-07-21	accel/tcg: Remove TranslatorOps.breakpoint_check	Richard Henderson	1	-18/+0
2021-07-21	target/avr: Implement gdb_adjust_breakpoint	Richard Henderson	4	-14/+15
2021-07-12	Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...	Peter Maydell	2	-7/+10
2021-07-09	target/avr: Mark some helpers noreturn	Richard Henderson	1	-4/+4
2021-07-09	target/avr: Use translator_use_goto_tb	Richard Henderson	1	-3/+6
2021-07-09	meson: Introduce target-specific Kconfig	Philippe Mathieu-Daudé	1	-0/+2
2021-06-29	target/avr: Convert to TranslatorOps	Richard Henderson	1	-104/+126
2021-06-29	target/avr: Change ctx to DisasContext* in gen_intermediate_code	Richard Henderson	1	-41/+43
2021-06-29	target/avr: Add DisasContextBase to DisasContext	Richard Henderson	1	-29/+29
2021-05-26	hw/core: Constify TCGCPUOps	Richard Henderson	1	-1/+1
2021-05-26	cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Introduce SysemuCPUOps structure	Philippe Mathieu-Daudé	1	-0/+6
2021-05-26	cpu: Move AVR target vmsd field from CPUClass to DeviceClass	Philippe Mathieu-Daudé	2	-3/+3
2021-05-26	cpu: Rename CPUClass vmsd -> legacy_vmsd	Philippe Mathieu-Daudé	1	-1/+1
2021-05-13	target/avr: Ignore unimplemented WDR opcode	Philippe Mathieu-Daudé	1	-5/+1
2021-03-15	target/avr: Fix interrupt execution	Ivanov Arkasha	1	-1/+3
2021-03-15	target/avr: Fix some comment spelling errors	Lichang Zhao	1	-3/+3
2021-02-20	target/avr/cpu: Use device_class_set_parent_realize()	Philippe Mathieu-Daudé	1	-3/+1
2021-02-05	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	Claudio Fontana	2	-7/+17
2021-02-05	cpu: move cc->do_interrupt to tcg_ops	Claudio Fontana	2	-3/+3