riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-07-11	target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation	Peter Maydell	1	-0/+1
2024-05-06	accel/tcg: Access tcg_cflags with getter / setter	Philippe Mathieu-Daudé	1	-1/+1
2024-04-25	hw, target: Add ResetType argument to hold and exit phase methods	Peter Maydell	1	-2/+2
2024-03-12	target/avr: Prefer fast cpu_env() over slower CPU QOM cast macro	Philippe Mathieu-Daudé	1	-20/+7
2024-03-12	target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handler	Philippe Mathieu-Daudé	1	-1/+1
2024-02-28	gdbstub: Infer number of core registers from XML	Akihiko Odaki	1	-1/+0
2024-02-03	target/avr: Populate CPUClass.mmu_index	Richard Henderson	1	-0/+6
2024-01-29	include/qemu: Add TCGCPUOps typedef to typedefs.h	Richard Henderson	1	-1/+1
2024-01-05	target/avr: Use generic cpu_list()	Gavin Shan	1	-15/+0
2024-01-05	cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()	Philippe Mathieu-Daudé	1	-7/+1
2023-11-28	hw/avr/atmega: Fix wrong initial value of stack pointer	Gihun Nam	1	-1/+9
2023-11-07	hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name()	Philippe Mathieu-Daudé	1	-2/+1
2023-10-04	accel/tcg: Remove cpu_set_cpustate_pointers	Richard Henderson	1	-2/+0
2023-10-03	target/*: Add instance_align to all cpu base classes	Richard Henderson	1	-0/+1
2023-06-05	target/*: Add missing includes of tcg/debug-assert.h	Richard Henderson	1	-0/+1
2023-03-01	target/avr: Replace `tb_pc()` with `tb->pc`	Anton Johansson	1	-1/+2
2022-12-16	target/avr: Convert to 3-phase reset	Peter Maydell	1	-4/+9
2022-10-26	target/avr: Convert to tcg_ops restore_state_to_opc	Richard Henderson	1	-0/+11
2022-10-04	accel/tcg: Introduce tb_pc and log_pc	Richard Henderson	1	-1/+1
2022-10-04	hw/core: Add CPUClass.get_pc	Richard Henderson	1	-0/+8
2022-06-20	target/avr: Drop avr_cpu_memory_rw_debug()	Bin Meng	1	-1/+0
2021-09-14	target/avr: Remove pointless use of CONFIG_USER_ONLY definition	Philippe Mathieu-Daudé	1	-3/+0
2021-07-21	target/avr: Implement gdb_adjust_breakpoint	Richard Henderson	1	-0/+1
2021-05-26	hw/core: Constify TCGCPUOps	Richard Henderson	1	-1/+1
2021-05-26	cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Introduce SysemuCPUOps structure	Philippe Mathieu-Daudé	1	-0/+6
2021-05-26	cpu: Move AVR target vmsd field from CPUClass to DeviceClass	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Rename CPUClass vmsd -> legacy_vmsd	Philippe Mathieu-Daudé	1	-1/+1
2021-02-20	target/avr/cpu: Use device_class_set_parent_realize()	Philippe Mathieu-Daudé	1	-3/+1
2021-02-05	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	Claudio Fontana	1	-5/+14
2021-02-05	cpu: move cc->do_interrupt to tcg_ops	Claudio Fontana	1	-1/+1
2021-02-05	cpu: Move tlb_fill to tcg_ops	Eduardo Habkost	1	-1/+1
2021-02-05	cpu: Move cpu_exec_* to tcg_ops	Eduardo Habkost	1	-1/+1
2021-02-05	cpu: Move synchronize_from_tb() to tcg_ops	Eduardo Habkost	1	-1/+1
2021-02-05	cpu: Introduce TCGCpuOperations struct	Eduardo Habkost	1	-1/+1
2021-01-07	tcg: Make tb arg to synchronize_from_tb const	Richard Henderson	1	-1/+2
2020-07-11	target/avr/cpu: Fix $PC displayed address	Philippe Mathieu-Daudé	1	-1/+1
2020-07-11	target/avr/cpu: Drop tlb_flush() in avr_cpu_reset()	Philippe Mathieu-Daudé	1	-2/+0
2020-07-11	target/avr: Add support for disassembling via option '-d in_asm'	Michael Rolnik	1	-1/+1
2020-07-10	target/avr: Add definitions of AVR core types	Michael Rolnik	1	-0/+151
2020-07-10	target/avr: CPU class: Add GDB support	Michael Rolnik	1	-0/+4
2020-07-10	target/avr: CPU class: Add migration support	Michael Rolnik	1	-0/+1
2020-07-10	target/avr: CPU class: Add memory management support	Michael Rolnik	1	-0/+3
2020-07-10	target/avr: CPU class: Add interrupt handling support	Michael Rolnik	1	-0/+2
2020-07-10	target/avr: Introduce basic CPU class object	Michael Rolnik	1	-0/+207