riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2017-02-01	arm: add trailing ; after MISMATCH_CHECK	Michael S. Tsirkin	1	-49/+49
2017-02-01	arm: better stub version for MISMATCH_CHECK	Michael S. Tsirkin	1	-1/+3
2017-01-27	armv7m: R14 should reset to 0xffffffff	Peter Maydell	1	-0/+3
2017-01-27	armv7m: FAULTMASK should be 0 on reset	Michael Davidsaver	1	-4/+6
2017-01-27	armv7m: Report no-coprocessor faults correctly	Peter Maydell	3	-0/+13
2017-01-27	armv7m: set CFSR.UNDEFINSTR on undefined instructions	Michael Davidsaver	1	-0/+1
2017-01-27	armv7m: honour CCR.STACKALIGN on exception entry	Michael Davidsaver	1	-4/+2
2017-01-27	armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR	Peter Maydell	3	-2/+69
2017-01-27	target/arm: Drop IS_M() macro	Peter Maydell	3	-8/+2
2017-01-27	armv7m: Clear FAULTMASK on return from non-NMI exceptions	Michael Davidsaver	1	-1/+6
2017-01-27	armv7m: Fix reads of CONTROL register bit 1	Michael Davidsaver	4	-17/+32
2017-01-27	armv7m: Explicit error for bad vector table	Michael Davidsaver	1	-1/+25
2017-01-27	armv7m: Replace armv7m.hack with unassigned_access handler	Michael Davidsaver	2	-6/+34
2017-01-27	armv7m: MRS/MSR: handle unprivileged access	Michael Davidsaver	1	-42/+37
2017-01-24	migration: extend VMStateInfo	Jianjun Duan	1	-4/+10
2017-01-20	Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging	Peter Maydell	1	-1/+1
2017-01-20	target-arm: Enable EL2 feature bit on A53 and A57	Peter Maydell	3	-0/+16
2017-01-20	target/arm/psci.c: If EL2 implemented, start CPUs in EL2	Peter Maydell	1	-7/+18
2017-01-20	target-arm: Add ARMCPU fields for GIC CPU i/f config	Peter Maydell	2	-0/+11
2017-01-20	target-arm: Expose output GPIO line for VCPU maintenance interrupt	Peter Maydell	2	-0/+5
2017-01-20	target/arm: Implement DBGVCR32_EL2 system register	Peter Maydell	1	-0/+7
2017-01-20	target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32()	Peter Maydell	1	-0/+14
2017-01-19	kvm: move cpu synchronization code	Vincent Palatin	1	-1/+1
2017-01-16	Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-common-tlb-reset-...	Peter Maydell	3	-17/+19
2017-01-13	target/arm: Fix ubfx et al for aarch64	Richard Henderson	1	-1/+1
2017-01-13	Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...	Peter Maydell	1	-0/+1
2017-01-13	cputlb: drop flush_global flag from tlb_flush	Alex Bennée	1	-13/+13
2017-01-13	qom/cpu: move tlb_flush to cpu_common_reset	Alex Bennée	2	-4/+6
2017-01-12	qmp: Report QOM type name on query-cpu-definitions	Eduardo Habkost	1	-0/+1
2017-01-10	target-arm: Use clrsb helper	Richard Henderson	3	-16/+4
2017-01-10	target-arm: Use clz opcode	Richard Henderson	6	-25/+7
2017-01-10	target-arm: Use new deposit and extract ops	Richard Henderson	2	-81/+37
2016-12-27	target-arm: Add VBAR support to ARM1176 CPUs	Cédric Le Goater	3	-6/+23
2016-12-27	target-arm: Log AArch64 exception returns	Peter Maydell	1	-0/+9
2016-12-27	target-arm: Fix aarch64 disas_ldst_single_struct	Richard Henderson	1	-2/+2
2016-12-27	target-arm: Fix aarch64 vec_reg_offset	Richard Henderson	1	-1/+2
2016-12-27	Correct value of ARM Cortex-A8 MVFR1 register.	Julian Brown	1	-1/+1
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth	35	-0/+49062