| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-12-13 | target/arm: Introduce gen_gvec_cls, gen_gvec_clz | Richard Henderson | 4 | -49/+49 |
| 2024-12-13 | target/arm: Convert ABS, NEG to decodetree | Richard Henderson | 2 | -15/+35 |
| 2024-12-13 | target/arm: Convert SQABS, SQNEG to decodetree | Richard Henderson | 2 | -45/+89 |
| 2024-12-13 | target/arm: Convert handle_fmov to decodetree | Richard Henderson | 2 | -154/+80 |
| 2024-12-13 | target/arm: Convert FJCVTZS to decodetree | Richard Henderson | 2 | -21/+22 |
| 2024-12-13 | target/arm: Convert handle_fpfpcvt to decodetree | Richard Henderson | 2 | -207/+194 |
| 2024-12-13 | target/arm: Convert FCVT (scalar) to decodetree | Richard Henderson | 2 | -103/+72 |
| 2024-12-13 | target/arm: Convert FRINT{32, 64}[ZX] (scalar) to decodetree | Richard Henderson | 2 | -130/+23 |
| 2024-12-13 | target/arm: Convert BFCVT to decodetree | Richard Henderson | 2 | -19/+10 |
| 2024-12-13 | target/arm: Convert FRINT[NPMSAXI] (scalar) to decodetree | Richard Henderson | 2 | -80/+47 |
| 2024-12-13 | target/arm: Convert FSQRT (scalar) to decodetree | Richard Henderson | 2 | -11/+62 |
| 2024-12-13 | target/arm: Remove helper_sqrt_f16 | Richard Henderson | 3 | -14/+2 |
| 2024-12-13 | target/arm: Pass fpstatus to vfp_sqrt* | Richard Henderson | 4 | -20/+19 |
| 2024-12-13 | target/arm: Convert FMOV, FABS, FNEG (scalar) to decodetree | Richard Henderson | 2 | -31/+81 |
| 2024-12-13 | target/arm: Fix decode of fp16 vector fabs, fneg, fsqrt | Richard Henderson | 1 | -3/+3 |
| 2024-12-13 | target/arm: Convert FCMP, FCMPE, FCCMP, FCCMPE to decodetree | Richard Henderson | 2 | -179/+112 |
| 2024-12-13 | target/arm: Introduce fp_access_check_vector_hsd | Richard Henderson | 1 | -81/+54 |
| 2024-12-13 | target/arm: Introduce fp_access_check_scalar_hsd | Richard Henderson | 1 | -30/+32 |
| 2024-12-13 | target/arm: Convert disas_cond_select to decodetree | Richard Henderson | 2 | -70/+17 |
| 2024-12-13 | target/arm: Convert CCMP, CCMN to decodetree | Richard Henderson | 2 | -47/+25 |
| 2024-12-13 | target/arm: Convert SETF8, SETF16 to decodetree | Richard Henderson | 2 | -41/+11 |
| 2024-12-13 | target/arm: Convert RMIF to decodetree | Richard Henderson | 2 | -23/+12 |
| 2024-12-13 | target/arm: Convert disas_adc_sbc to decodetree | Richard Henderson | 2 | -27/+22 |
| 2024-12-13 | target/arm: Convert disas_data_proc_3src to decodetree | Richard Henderson | 2 | -76/+59 |
| 2024-12-13 | target/arm: Convert disas_add_sub_reg to decodetree | Richard Henderson | 2 | -46/+27 |
| 2024-12-13 | target/arm: Convert disas_add_sub_ext_reg to decodetree | Richard Henderson | 2 | -45/+29 |
| 2024-12-13 | target/arm: Convert disas_logic_reg to decodetree | Richard Henderson | 2 | -74/+50 |
| 2024-12-13 | target/arm: Convert XPAC[ID] to decodetree | Richard Henderson | 2 | -86/+16 |
| 2024-12-13 | target/arm: Convert PAC[ID]*, AUT[ID]* to decodetree | Richard Henderson | 2 | -128/+58 |
| 2024-12-13 | target/arm: Convert CLZ, CLS to decodetree | Richard Henderson | 2 | -42/+33 |
| 2024-12-13 | target/arm: Convert RBIT, REV16, REV32, REV64 to decodetree | Richard Henderson | 2 | -76/+72 |
| 2024-12-13 | target/arm: Convert PACGA to decodetree | Richard Henderson | 2 | -54/+13 |
| 2024-12-13 | target/arm: Convert SUBP, IRG, GMI to decodetree | Richard Henderson | 2 | -42/+59 |
| 2024-12-13 | target/arm: Convert CRC32, CRC32C to decodetree | Richard Henderson | 2 | -60/+53 |
| 2024-12-13 | target/arm: Convert LSLV, LSRV, ASRV, RORV to decodetree | Richard Henderson | 2 | -25/+25 |
| 2024-12-13 | target/arm: Convert UDIV, SDIV to decodetree | Richard Henderson | 2 | -32/+39 |
| 2024-12-13 | target/arm: Add section labels for "Data Processing (register)" | Richard Henderson | 1 | -2/+17 |
| 2024-12-12 | Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging | Stefan Hajnoczi | 2 | -2/+2 |
| 2024-12-11 | target/arm: Set default NaN pattern explicitly | Peter Maydell | 1 | -0/+2 |
| 2024-12-11 | target/arm: Copy entire float_status in is_ebf | Richard Henderson | 1 | -13/+7 |
| 2024-12-11 | target/arm: Set Float3NaNPropRule explicitly | Peter Maydell | 1 | -0/+5 |
| 2024-12-11 | target/arm: Set FloatInfZeroNaNRule explicitly | Peter Maydell | 1 | -0/+3 |
| 2024-12-10 | arm: Replace type_register() with type_register_static() | Zhao Liu | 2 | -2/+2 |
| 2024-11-26 | target/arm/tcg/: fix typo in FEAT name | Pierrick Bouvier | 1 | -1/+1 |
| 2024-11-26 | target/arm/tcg/cpu32.c: swap ATCM and BTCM register names | Michael Tokarev | 1 | -2/+2 |
| 2024-11-19 | target/arm/hvf: Add trace.h header | Peter Maydell | 2 | -1/+2 |
| 2024-11-19 | arm/ptw: Honour WXN/UWXN and SIF in short-format descriptors | Pavel Skripkin | 1 | -31/+24 |
| 2024-11-19 | arm/ptw: Make get_S1prot accept decoded AP | Pavel Skripkin | 1 | -8/+9 |
| 2024-11-16 | target/arm: Drop user-only special case in sve_stN_r | Richard Henderson | 1 | -4/+0 |
| 2024-11-05 | target/arm: Enable FEAT_CMOW for -cpu max | Gustavo Romero | 4 | -0/+12 |
