riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-01-12	target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns	Peter Maydell	1	-0/+7
2021-01-12	target/arm: add aarch32 ID register fields to cpu.h	Leif Lindholm	1	-0/+28
2021-01-12	target/arm: add aarch64 ID register fields to cpu.h	Leif Lindholm	1	-0/+15
2021-01-12	target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h	Leif Lindholm	1	-0/+31
2021-01-12	target/arm: make ARMCPU.ctr 64-bit	Leif Lindholm	1	-1/+1
2021-01-12	target/arm: make ARMCPU.clidr 64-bit	Leif Lindholm	1	-1/+1
2021-01-12	target/arm: fix typo in cpu.h ID_AA64PFR1 field name	Leif Lindholm	1	-1/+1
2021-01-12	target/arm: enable Small Translation tables in max CPU	Rémi Denis-Courmont	1	-0/+1
2021-01-12	target/arm: ARMv8.4-TTST extension	Rémi Denis-Courmont	2	-2/+18
2021-01-08	target/arm: Remove timer_del()/timer_deinit() before timer_free()	Peter Maydell	1	-2/+0
2021-01-08	target/arm: Implement Cortex-M55 model	Peter Maydell	1	-0/+42
2021-01-08	target/arm: Implement FPCXT_NS fp system register	Peter Maydell	1	-3/+99
2021-01-08	target/arm: Correct store of FPSCR value via FPCXT_S	Peter Maydell	1	-6/+6
2021-01-08	target/arm: Fix MTE0_ACTIVE	Richard Henderson	1	-1/+1
2021-01-07	tcg: Make tb arg to synchronize_from_tb const	Richard Henderson	1	-1/+2
2021-01-07	tcg: Make DisasContextBase.tb const	Richard Henderson	1	-1/+1
2020-12-19	migration: Replace migration's JSON writer by the general one	Markus Armbruster	1	-3/+3
2020-12-19	qapi: Use QAPI_LIST_PREPEND() where possible	Eric Blake	2	-16/+3
2020-12-15	arm/cpu64: Register "aarch64" as class property	Eduardo Habkost	1	-10/+6
2020-12-10	arm: do not use ram_size global	Paolo Bonzini	1	-1/+2
2020-12-10	target/arm: Implement M-profile "minimal RAS implementation"	Peter Maydell	2	-0/+18
2020-12-10	target/arm: Implement CCR_S.TRD behaviour for SG insns	Peter Maydell	1	-0/+86
2020-12-10	hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bit	Peter Maydell	1	-0/+2
2020-12-10	target/arm: Implement new v8.1M VLLDM and VLSTM encodings	Peter Maydell	2	-1/+26
2020-12-10	target/arm: Implement new v8.1M NOCP check for exception return	Peter Maydell	1	-1/+21
2020-12-10	target/arm: In v8.1M, don't set HFSR.FORCED on vector table fetch failures	Peter Maydell	1	-1/+5
2020-12-10	target/arm: For v8.1M, always clear R0-R3, R12, APSR, EPSR on exception entry	Peter Maydell	1	-4/+12
2020-12-10	hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1M	Peter Maydell	2	-0/+8
2020-12-10	target/arm: Implement FPCXT_S fp system register	Peter Maydell	1	-0/+58
2020-12-10	target/arm: Factor out preserve-fp-state from full_vfp_access_check()	Peter Maydell	1	-18/+27
2020-12-10	target/arm: Use new FPCR_NZCV_MASK constant	Peter Maydell	1	-2/+2
2020-12-10	target/arm: Implement M-profile FPSCR_nzcvqc	Peter Maydell	2	-0/+40
2020-12-10	target/arm: Implement VLDR/VSTR system register	Peter Maydell	2	-0/+105
2020-12-10	target/arm: Move general-use constant expanders up in translate.c	Peter Maydell	1	-21/+25
2020-12-10	target/arm: Refactor M-profile VMSR/VMRS handling	Peter Maydell	2	-11/+168
2020-12-10	target/arm: Enforce M-profile VMRS/VMSR register restrictions	Peter Maydell	1	-1/+4
2020-12-10	target/arm: Implement CLRM instruction	Peter Maydell	2	-1/+43
2020-12-10	target/arm: Implement VSCCLRM insn	Peter Maydell	4	-11/+111
2020-12-10	target/arm: Don't clobber ID_PFR1.Security on M-profile cores	Peter Maydell	1	-1/+1
2020-12-10	target/arm: Implement v8.1M PXN extension	Peter Maydell	1	-1/+6
2020-11-23	target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0	Peter Maydell	1	-4/+8
2020-11-23	target/arm: fix stage 2 page-walks in 32-bit emulation	Rémi Denis-Courmont	1	-2/+2
2020-11-15	arm tcg cpus: Fix Lesser GPL version number	Chetan Pant	30	-30/+30
2020-11-10	target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check	Peter Maydell	1	-4/+4
2020-11-10	target/arm: Fix neon VTBL/VTBX for len > 1	Richard Henderson	3	-40/+29
2020-11-10	target/arm: add space before the open parenthesis '('	Xinhao Zhang	1	-1/+1
2020-11-10	target/arm: Don't use '#' flag of printf format	Xinhao Zhang	1	-2/+2
2020-11-10	target/arm: add spaces around operator	Xinhao Zhang	3	-9/+9
2020-11-02	target/arm: Get correct MMU index for other-security-state	Peter Maydell	1	-1/+2
2020-11-02	target/arm: fix LORID_EL1 access check	Rémi Denis-Courmont	1	-14/+5