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path: root/target/arm/vfp.decode
AgeCommit message (Expand)AuthorFilesLines
2021-06-21target/arm: Don't NOCP fault for FPCXT_NS accessesPeter Maydell1-14/+0
2021-06-03target/arm: Implement scalar float32 to bfloat16 conversionRichard Henderson1-0/+2
2020-12-10target/arm: Implement VLDR/VSTR system registerPeter Maydell1-0/+14
2020-11-15arm tcg cpus: Fix Lesser GPL version numberChetan Pant1-1/+1
2020-09-01target/arm: Implement VFP fp16 VMOV between gp and halfprec registersPeter Maydell1-0/+1
2020-09-01target/arm: Implement VFP fp16 VRINT*Peter Maydell1-0/+3
2020-09-01target/arm: Implement VFP fp16 VCVT between float and fixed-pointPeter Maydell1-0/+2
2020-09-01target/arm: Implement VFP fp16 VCVT between float and integerPeter Maydell1-0/+4
2020-09-01target/arm: Implement VFP fp16 VLDR and VSTRPeter Maydell1-2/+1
2020-09-01target/arm: Implement VFP fp16 VCMPPeter Maydell1-0/+2
2020-09-01target/arm: Implement VFP fp16 for VMOV immediatePeter Maydell1-0/+2
2020-09-01target/arm: Implement VFP fp16 for VABS, VNEG, VSQRTPeter Maydell1-0/+3
2020-09-01target/arm: Implement VFP fp16 for fused-multiply-addPeter Maydell1-0/+5
2020-09-01target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMULPeter Maydell1-0/+5
2020-09-01target/arm: Implement VFP fp16 for VFP_BINOP operationsPeter Maydell1-0/+4
2020-08-24target/arm: Do M-profile NOCP checks early and via decodetreePeter Maydell1-2/+0
2020-02-28target/arm: Split VFM decodeRichard Henderson1-8/+9
2020-02-28target/arm: Add formats for some vfp 2 and 3-register insnsRichard Henderson1-90/+60
2020-02-28target/arm: Move VLLDM and VLSTM to vfp.decodeRichard Henderson1-0/+2
2019-06-17target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_immPeter Maydell1-4/+6
2019-06-13target/arm: Convert float-to-integer VCVT insns to decodetreePeter Maydell1-0/+6
2019-06-13target/arm: Convert VCVT fp/fixed-point conversion insns to decodetreePeter Maydell1-0/+10
2019-06-13target/arm: Convert VJCVT to decodetreePeter Maydell1-0/+4
2019-06-13target/arm: Convert integer-to-float insns to decodetreePeter Maydell1-0/+6
2019-06-13target/arm: Convert double-single precision conversion insns to decodetreePeter Maydell1-0/+6
2019-06-13target/arm: Convert VFP round insns to decodetreePeter Maydell1-0/+15
2019-06-13target/arm: Convert the VCVT-to-f16 insns to decodetreePeter Maydell1-0/+6
2019-06-13target/arm: Convert the VCVT-from-f16 insns to decodetreePeter Maydell1-0/+6
2019-06-13target/arm: Convert VFP comparison insns to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VMOV (register) to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VSQRT to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VNEG to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VABS to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VMOV (imm) to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VFP fused multiply-add insns to decodetreePeter Maydell1-0/+9
2019-06-13target/arm: Convert VDIV to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VSUB to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VADD to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VNMUL to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VMUL to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VFP VNMLA to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VFP VNMLS to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VFP VMLS to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert VFP VMLA to decodetreePeter Maydell1-0/+6
2019-06-13target/arm: Convert the VFP load/store multiple insns to decodetreePeter Maydell1-0/+18
2019-06-13target/arm: Convert VFP VLDR and VSTR to decodetreePeter Maydell1-0/+7
2019-06-13target/arm: Convert VFP two-register transfer insns to decodetreePeter Maydell1-0/+5
2019-06-13target/arm: Convert "single-precision" register moves to decodetreePeter Maydell1-0/+4
2019-06-13target/arm: Convert "double-precision" register moves to decodetreePeter Maydell1-0/+36
2019-06-13target/arm: Add stubs for AArch32 VFP decodetreePeter Maydell1-0/+28