riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-06-17	target/arm: Move vfp_expand_imm() to translate.[ch]	Peter Maydell	1	-0/+7
2019-06-13	target/arm: Use tcg_gen_gvec_bitsel	Richard Henderson	1	-3/+0
2019-04-29	target/arm: Implement M-profile lazy FP state preservation	Peter Maydell	1	-0/+1
2019-04-29	target/arm: Activate M-profile floating point context when FPCCR.ASPEN is set	Peter Maydell	1	-0/+1
2019-04-29	target/arm: Set FPCCR.S when executing M-profile floating point insns	Peter Maydell	1	-0/+1
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster	1	-5/+2
2019-03-05	target/arm: Add set/clear_pstate_bits, share gen_ss_advance	Richard Henderson	1	-0/+34
2019-02-15	target/arm: Use vector operations for saturation	Richard Henderson	1	-0/+4
2019-02-05	target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore	Richard Henderson	1	-1/+2
2019-02-05	target/arm: Default handling of BTYPE during translation	Richard Henderson	1	-2/+7
2019-02-05	target/arm: Add BT and BTYPE to tb->flags	Richard Henderson	1	-0/+4
2019-01-21	target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII	Richard Henderson	1	-2/+1
2019-01-21	target/arm: Add PAuth active bit to tbflags	Richard Henderson	1	-0/+2
2018-10-24	target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT, NEON_3R_VCGE	Richard Henderson	1	-0/+2
2018-10-24	target/arm: Use gvec for NEON_3R_VML	Richard Henderson	1	-0/+2
2018-10-24	target/arm: Use gvec for VSRI, VSLI	Richard Henderson	1	-0/+2
2018-10-24	target/arm: Use gvec for VSRA	Richard Henderson	1	-0/+2
2018-10-24	target/arm: Use gvec for NEON_3R_LOGIC insns	Richard Henderson	1	-0/+6
2018-10-24	target/arm: Convert v8 extensions from feature bits to isar tests	Richard Henderson	1	-0/+7
2018-10-08	target/arm: Define new TBFLAG for v8M stack checking	Peter Maydell	1	-0/+1
2018-05-17	target/arm: convert conversion helpers to fpst/ahp_flag	Alex Bennée	1	-0/+12
2018-05-09	target/arm: avoid integer overflow in next_page PC check	Emilio G. Cota	1	-1/+1
2018-04-10	tcg: Introduce tcg_set_insn_start_param	Richard Henderson	1	-1/+1
2018-02-09	target/arm: Add SVE state to TB->FLAGS	Richard Henderson	1	-0/+2
2018-01-25	target/arm: Mark disas_set_insn_syndrome inline	Richard Henderson	1	-1/+1
2017-12-29	tcg: Dynamically allocate TCGOps	Richard Henderson	1	-5/+5
2017-10-24	tcg: Initialize cpu_env generically	Richard Henderson	1	-1/+0
2017-09-07	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170907'...	Peter Maydell	1	-0/+1
2017-09-07	target/arm: Implement BXNS, and banked stack pointers	Peter Maydell	1	-0/+1
2017-09-06	target/arm: [tcg] Port to generic translation framework	Lluís Vilanova	1	-7/+1
2017-09-06	target/arm: [tcg] Port to translate_insn	Lluís Vilanova	1	-0/+1
2017-09-06	target/arm: [tcg] Port to DisasContextBase	Lluís Vilanova	1	-5/+6
2017-09-06	target: [tcg] Use a generic enum for DISAS_ values	Lluís Vilanova	1	-9/+14
2017-09-06	target/arm: Use DISAS_NORETURN	Richard Henderson	1	-6/+2
2017-07-19	tcg: Pass generic CPUState to gen_intermediate_code()	Lluís Vilanova	1	-2/+2
2017-07-17	target/arm/translate.h: expand comment on DISAS_EXIT	Alex Bennée	1	-1/+4
2017-06-05	target/arm: optimize indirect branches	Emilio G. Cota	1	-0/+4
2017-06-02	arm: Add support for M profile CPUs having different MMU index semantics	Peter Maydell	1	-1/+1
2017-04-20	arm: Implement M profile exception return properly	Peter Maydell	1	-0/+4
2017-04-20	arm: Track M profile handler mode state in TB flags	Peter Maydell	1	-0/+1
2017-02-07	target/arm: A32, T32: Create Instruction Syndromes for Data Aborts	Peter Maydell	1	-0/+14
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth	1	-0/+155