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authorRichard Henderson <richard.henderson@linaro.org>2018-10-24 07:50:16 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-10-24 07:50:16 +0100
commit962fcbf2efe57231a9f5df0ae0f40c05e35628ba (patch)
tree0525afdd5553ce6f029fb30cb40d6de4453ae669 /target/arm/translate.h
parent5256df880d1312a58472af3fb0a3c51e708f2161 (diff)
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target/arm: Convert v8 extensions from feature bits to isar tests
Most of the v8 extensions are self-contained within the ISAR registers and are not implied by other feature bits, which makes them the easiest to convert. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181016223115.24100-4-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.h')
-rw-r--r--target/arm/translate.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/translate.h b/target/arm/translate.h
index c1b65f3..5bc1581 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -7,6 +7,7 @@
/* internal defines */
typedef struct DisasContext {
DisasContextBase base;
+ const ARMISARegisters *isar;
target_ulong pc;
target_ulong page_start;
@@ -190,4 +191,10 @@ static inline TCGv_i32 get_ahp_flag(void)
return ret;
}
+/*
+ * Forward to the isar_feature_* tests given a DisasContext pointer.
+ */
+#define dc_isar_feature(name, ctx) \
+ ({ DisasContext *ctx_ = (ctx); isar_feature_##name(ctx_->isar); })
+
#endif /* TARGET_ARM_TRANSLATE_H */