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path: root/target/arm/translate.h
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2019-12-16target/arm: Handle AArch32 CP15 trapping via HSTR_EL2Marc Zyngier1-0/+2
2019-09-04Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into stagingPeter Maydell1-1/+1
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen1-1/+1
2019-09-03Revert "target/arm: Use unallocated_encoding for aarch32"Richard Henderson1-2/+0
2019-08-16target/arm: Use unallocated_encoding for aarch32Richard Henderson1-0/+2
2019-08-16target/arm: Replace s->pc with s->base.pc_nextRichard Henderson1-1/+0
2019-08-16target/arm: Introduce pc_currRichard Henderson1-0/+2
2019-08-16target/arm: Fix routing of singlestep exceptionsPeter Maydell1-4/+11
2019-08-16target/arm: Factor out 'generate singlestep exception' functionPeter Maydell1-0/+23
2019-07-01target/arm: Move CPU state dumping routines to cpu.cPhilippe Mathieu-Daudé1-5/+0
2019-06-17target/arm: Move vfp_expand_imm() to translate.[ch]Peter Maydell1-0/+7
2019-06-13target/arm: Use tcg_gen_gvec_bitselRichard Henderson1-3/+0
2019-04-29target/arm: Implement M-profile lazy FP state preservationPeter Maydell1-0/+1
2019-04-29target/arm: Activate M-profile floating point context when FPCCR.ASPEN is setPeter Maydell1-0/+1
2019-04-29target/arm: Set FPCCR.S when executing M-profile floating point insnsPeter Maydell1-0/+1
2019-04-18qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster1-5/+2
2019-03-05target/arm: Add set/clear_pstate_bits, share gen_ss_advanceRichard Henderson1-0/+34
2019-02-15target/arm: Use vector operations for saturationRichard Henderson1-0/+4
2019-02-05target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignoreRichard Henderson1-1/+2
2019-02-05target/arm: Default handling of BTYPE during translationRichard Henderson1-2/+7
2019-02-05target/arm: Add BT and BTYPE to tb->flagsRichard Henderson1-0/+4
2019-01-21target/arm: Merge TBFLAG_AA_TB{0, 1} to TBIIRichard Henderson1-2/+1
2019-01-21target/arm: Add PAuth active bit to tbflagsRichard Henderson1-0/+2
2018-10-24target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT, NEON_3R_VCGERichard Henderson1-0/+2
2018-10-24target/arm: Use gvec for NEON_3R_VMLRichard Henderson1-0/+2
2018-10-24target/arm: Use gvec for VSRI, VSLIRichard Henderson1-0/+2
2018-10-24target/arm: Use gvec for VSRARichard Henderson1-0/+2
2018-10-24target/arm: Use gvec for NEON_3R_LOGIC insnsRichard Henderson1-0/+6
2018-10-24target/arm: Convert v8 extensions from feature bits to isar testsRichard Henderson1-0/+7
2018-10-08target/arm: Define new TBFLAG for v8M stack checkingPeter Maydell1-0/+1
2018-05-17target/arm: convert conversion helpers to fpst/ahp_flagAlex Bennée1-0/+12
2018-05-09target/arm: avoid integer overflow in next_page PC checkEmilio G. Cota1-1/+1
2018-04-10tcg: Introduce tcg_set_insn_start_paramRichard Henderson1-1/+1
2018-02-09target/arm: Add SVE state to TB->FLAGSRichard Henderson1-0/+2
2018-01-25target/arm: Mark disas_set_insn_syndrome inlineRichard Henderson1-1/+1
2017-12-29tcg: Dynamically allocate TCGOpsRichard Henderson1-5/+5
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson1-1/+0
2017-09-07Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170907'...Peter Maydell1-0/+1
2017-09-07target/arm: Implement BXNS, and banked stack pointersPeter Maydell1-0/+1
2017-09-06target/arm: [tcg] Port to generic translation frameworkLluís Vilanova1-7/+1
2017-09-06target/arm: [tcg] Port to translate_insnLluís Vilanova1-0/+1
2017-09-06target/arm: [tcg] Port to DisasContextBaseLluís Vilanova1-5/+6
2017-09-06target: [tcg] Use a generic enum for DISAS_ valuesLluís Vilanova1-9/+14
2017-09-06target/arm: Use DISAS_NORETURNRichard Henderson1-6/+2
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova1-2/+2
2017-07-17target/arm/translate.h: expand comment on DISAS_EXITAlex Bennée1-1/+4
2017-06-05target/arm: optimize indirect branchesEmilio G. Cota1-0/+4
2017-06-02arm: Add support for M profile CPUs having different MMU index semanticsPeter Maydell1-1/+1
2017-04-20arm: Implement M profile exception return properlyPeter Maydell1-0/+4
2017-04-20arm: Track M profile handler mode state in TB flagsPeter Maydell1-0/+1
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