| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-05-14 | target/arm: Vectorize SABA/UABA | Richard Henderson | 1 | -0/+5 |
| 2020-05-14 | target/arm: Vectorize SABD/UABD | Richard Henderson | 1 | -0/+5 |
| 2020-05-14 | target/arm: Create gen_gvec_{qrdmla,qrdmls} | Richard Henderson | 1 | -0/+5 |
| 2020-05-14 | target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub} | Richard Henderson | 1 | -4/+9 |
| 2020-05-14 | target/arm: Create gen_gvec_{cmtst,ushl,sshl} | Richard Henderson | 1 | -3/+7 |
| 2020-05-14 | target/arm: Create gen_gvec_{mla,mls} | Richard Henderson | 1 | -2/+5 |
| 2020-05-14 | target/arm: Create gen_gvec_{ceq,clt,cle,cgt,cge}0 | Richard Henderson | 1 | -5/+11 |
| 2020-05-14 | target/arm: Create gen_gvec_{sri,sli} | Richard Henderson | 1 | -2/+5 |
| 2020-05-14 | target/arm: Create gen_gvec_{u,s}{rshr,rsra} | Richard Henderson | 1 | -0/+9 |
| 2020-05-14 | target/arm: Create gen_gvec_[us]sra | Richard Henderson | 1 | -2/+5 |
| 2020-05-04 | target/arm: Move gen_ function typedefs to translate.h | Peter Maydell | 1 | -0/+17 |
| 2020-05-04 | target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree | Peter Maydell | 1 | -0/+9 |
| 2020-04-30 | target/arm: Vectorize integer comparison vs zero | Richard Henderson | 1 | -0/+5 |
| 2020-02-21 | target/arm: Vectorize USHL and SSHL | Richard Henderson | 1 | -0/+6 |
| 2020-02-07 | target/arm: Update get_a64_user_mem_index for VHE | Richard Henderson | 1 | -0/+2 |
| 2020-02-07 | target/arm: Rename ARMMMUIdx_S1SE[01] to ARMMMUIdx_SE10_[01] | Richard Henderson | 1 | -1/+1 |
| 2019-12-16 | target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 | Marc Zyngier | 1 | -0/+2 |
| 2019-09-04 | Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging | Peter Maydell | 1 | -1/+1 |
| 2019-09-03 | tcg: TCGMemOp is now accelerator independent MemOp | Tony Nguyen | 1 | -1/+1 |
| 2019-09-03 | Revert "target/arm: Use unallocated_encoding for aarch32" | Richard Henderson | 1 | -2/+0 |
| 2019-08-16 | target/arm: Use unallocated_encoding for aarch32 | Richard Henderson | 1 | -0/+2 |
| 2019-08-16 | target/arm: Replace s->pc with s->base.pc_next | Richard Henderson | 1 | -1/+0 |
| 2019-08-16 | target/arm: Introduce pc_curr | Richard Henderson | 1 | -0/+2 |
| 2019-08-16 | target/arm: Fix routing of singlestep exceptions | Peter Maydell | 1 | -4/+11 |
| 2019-08-16 | target/arm: Factor out 'generate singlestep exception' function | Peter Maydell | 1 | -0/+23 |
| 2019-07-01 | target/arm: Move CPU state dumping routines to cpu.c | Philippe Mathieu-Daudé | 1 | -5/+0 |
| 2019-06-17 | target/arm: Move vfp_expand_imm() to translate.[ch] | Peter Maydell | 1 | -0/+7 |
| 2019-06-13 | target/arm: Use tcg_gen_gvec_bitsel | Richard Henderson | 1 | -3/+0 |
| 2019-04-29 | target/arm: Implement M-profile lazy FP state preservation | Peter Maydell | 1 | -0/+1 |
| 2019-04-29 | target/arm: Activate M-profile floating point context when FPCCR.ASPEN is set | Peter Maydell | 1 | -0/+1 |
| 2019-04-29 | target/arm: Set FPCCR.S when executing M-profile floating point insns | Peter Maydell | 1 | -0/+1 |
| 2019-04-18 | qom/cpu: Simplify how CPUClass:cpu_dump_state() prints | Markus Armbruster | 1 | -5/+2 |
| 2019-03-05 | target/arm: Add set/clear_pstate_bits, share gen_ss_advance | Richard Henderson | 1 | -0/+34 |
| 2019-02-15 | target/arm: Use vector operations for saturation | Richard Henderson | 1 | -0/+4 |
| 2019-02-05 | target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore | Richard Henderson | 1 | -1/+2 |
| 2019-02-05 | target/arm: Default handling of BTYPE during translation | Richard Henderson | 1 | -2/+7 |
| 2019-02-05 | target/arm: Add BT and BTYPE to tb->flags | Richard Henderson | 1 | -0/+4 |
| 2019-01-21 | target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII | Richard Henderson | 1 | -2/+1 |
| 2019-01-21 | target/arm: Add PAuth active bit to tbflags | Richard Henderson | 1 | -0/+2 |
| 2018-10-24 | target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT, NEON_3R_VCGE | Richard Henderson | 1 | -0/+2 |
| 2018-10-24 | target/arm: Use gvec for NEON_3R_VML | Richard Henderson | 1 | -0/+2 |
| 2018-10-24 | target/arm: Use gvec for VSRI, VSLI | Richard Henderson | 1 | -0/+2 |
| 2018-10-24 | target/arm: Use gvec for VSRA | Richard Henderson | 1 | -0/+2 |
| 2018-10-24 | target/arm: Use gvec for NEON_3R_LOGIC insns | Richard Henderson | 1 | -0/+6 |
| 2018-10-24 | target/arm: Convert v8 extensions from feature bits to isar tests | Richard Henderson | 1 | -0/+7 |
| 2018-10-08 | target/arm: Define new TBFLAG for v8M stack checking | Peter Maydell | 1 | -0/+1 |
| 2018-05-17 | target/arm: convert conversion helpers to fpst/ahp_flag | Alex Bennée | 1 | -0/+12 |
| 2018-05-09 | target/arm: avoid integer overflow in next_page PC check | Emilio G. Cota | 1 | -1/+1 |
| 2018-04-10 | tcg: Introduce tcg_set_insn_start_param | Richard Henderson | 1 | -1/+1 |
| 2018-02-09 | target/arm: Add SVE state to TB->FLAGS | Richard Henderson | 1 | -0/+2 |
