riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-05-30	target/arm: Implement FEAT WFxT and enable for '-cpu max'	Peter Maydell	1	-0/+5
2024-04-25	target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI	Jinjie Ruan	1	-0/+5
2024-03-07	target/arm: Implement FEAT_ECV CNTPOFF_EL2 handling	Peter Maydell	1	-0/+5
2024-03-07	target/arm: Implement new FEAT_ECV trap bits	Peter Maydell	1	-0/+5
2024-01-26	target/arm: Fix incorrect aa64_tidcp1 feature check	Peter Maydell	1	-1/+1
2024-01-26	target/arm/cpu-features: Include missing 'hw/registerfields.h' header	Philippe Mathieu-Daudé	1	-0/+2
2024-01-09	target/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits	Peter Maydell	1	-0/+5
2024-01-09	target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NV	Peter Maydell	1	-0/+5
2023-11-02	linux-user/elfload: Add missing arm64 hwcap values	Marielle Novastrider	1	-0/+5
2023-10-27	target/arm: Move ID_AA64DFR* feature tests together	Peter Maydell	1	-5/+5
2023-10-27	target/arm: Move ID_AA64PFR* tests together	Peter Maydell	1	-43/+43
2023-10-27	target/arm: Move ID_AA64ISAR* test functions together	Peter Maydell	1	-35/+35
2023-10-27	target/arm: Move ID_AA64MMFR0 tests up to before MMFR1 and MMFR2	Peter Maydell	1	-60/+60
2023-10-27	target/arm: Move ID_AA64MMFR1 and ID_AA64MMFR2 tests together	Peter Maydell	1	-30/+30
2023-10-27	target/arm: Move feature test functions to their own header	Peter Maydell	1	-0/+994