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target-sh4
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translate.c
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Commit message (
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Author
Files
Lines
2013-03-12
target-sh4: Introduce SuperHCPU subclasses
Andreas Färber
1
-84
/
+0
2013-03-03
gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end
Peter Maydell
1
-2
/
+2
2013-02-23
target-sh4: Use mul*2 for dmul*
Richard Henderson
1
-28
/
+2
2013-02-16
target-sh4: Move TCG initialization to SuperHCPU initfn
Andreas Färber
1
-2
/
+1
2013-02-16
target-sh4: Introduce QOM realizefn for SuperHCPU
Andreas Färber
1
-2
/
+3
2012-12-19
exec: move include files to include/exec/
Paolo Bonzini
1
-1
/
+1
2012-12-19
build: kill libdis, move disassemblers to disas/
Paolo Bonzini
1
-1
/
+1
2012-12-08
TCG: Use gen_opc_instr_start from context instead of global variable.
Evgeny Voevodin
1
-3
/
+3
2012-12-08
TCG: Use gen_opc_icount from context instead of global variable.
Evgeny Voevodin
1
-1
/
+1
2012-12-08
TCG: Use gen_opc_pc from context instead of global variable.
Evgeny Voevodin
1
-2
/
+2
2012-11-17
TCG: Use gen_opc_buf from context instead of global variable.
Evgeny Voevodin
1
-3
/
+3
2012-11-17
TCG: Use gen_opc_ptr from context instead of global variable.
Evgeny Voevodin
1
-4
/
+4
2012-11-10
disas: avoid using cpu_single_env
Blue Swirl
1
-1
/
+1
2012-09-27
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
Richard Henderson
1
-1
/
+1
2012-09-21
target-sh4: remove useless code
Aurelien Jarno
1
-4
/
+0
2012-09-21
target-sh4: cleanup DisasContext
Aurelien Jarno
1
-30
/
+26
2012-09-21
target-sh4: rework exceptions handling
Aurelien Jarno
1
-6
/
+12
2012-09-21
target-sh4: remove gen_clr_t() and gen_set_t()
Aurelien Jarno
1
-13
/
+3
2012-09-21
target-sh4: optimize swap.w
Aurelien Jarno
1
-11
/
+1
2012-09-21
target-sh4: optimize xtrct
Aurelien Jarno
1
-1
/
+0
2012-09-21
target-sh4: implement addv and subv using TCG
Aurelien Jarno
1
-2
/
+34
2012-09-21
target-sh4: implement addc and subc using TCG
Aurelien Jarno
1
-2
/
+36
2012-09-15
target-sh4: switch to AREG0 free mode
Blue Swirl
1
-51
/
+63
2012-06-04
Kill off cpu_state_reset()
Andreas Färber
1
-5
/
+0
2012-06-04
target-sh4: Let cpu_sh4_init() return SuperHCPU
Andreas Färber
1
-2
/
+2
2012-04-30
target-sh4: Start QOM'ifying CPU init
Andreas Färber
1
-2
/
+0
2012-04-30
target-sh4: QOM'ify CPU reset
Andreas Färber
1
-20
/
+2
2012-04-30
target-sh4: QOM'ify CPU
Andreas Färber
1
-1
/
+3
2012-03-14
target-sh4: Don't overuse CPUState
Andreas Färber
1
-23
/
+23
2012-03-14
Rename cpu_reset() to cpu_state_reset()
Andreas Färber
1
-2
/
+2
2012-02-28
target-sh4: Clean includes
Stefan Weil
1
-6
/
+0
2012-01-10
target-sh4: ignore ocbp and ocbwb instructions
Aurelien Jarno
1
-11
/
+3
2012-01-07
target-sh4: Fix operands for fipr, ftrv instructions
Stefan Weil
1
-3
/
+3
2011-08-20
Use glib memory allocation and free functions
Anthony Liguori
1
-1
/
+1
2011-06-26
Remove exec-all.h include directives
Blue Swirl
1
-1
/
+0
2011-04-20
Remove unused function parameters from gen_pc_load and rename the function
Stefan Weil
1
-2
/
+1
2011-04-10
Fix conversions from pointer to tcg_target_long
Stefan Weil
1
-1
/
+1
2011-02-04
target-sh4: fix negc
Aurelien Jarno
1
-2
/
+2
2011-01-16
target-sh4: implement negc using TCG
Aurelien Jarno
1
-1
/
+15
2011-01-16
target-sh4: use rotl/rotr when possible
Aurelien Jarno
1
-5
/
+3
2011-01-14
target-sh4: use setcond when possible
Aurelien Jarno
1
-29
/
+27
2011-01-14
target-sh4: log instructions start in TCG code
Aurelien Jarno
1
-0
/
+4
2011-01-14
target-sh4: simplify comparisons after a 'and' op
Aurelien Jarno
1
-3
/
+3
2011-01-14
target-sh4: fix reset on r2d
Aurelien Jarno
1
-12
/
+8
2011-01-14
target-sh4: optimize exceptions
Aurelien Jarno
1
-5
/
+0
2011-01-14
target-sh4: add ftrv instruction
Aurelien Jarno
1
-0
/
+11
2011-01-14
target-sh4: add fipr instruction
Aurelien Jarno
1
-0
/
+12
2011-01-14
target-sh4: implement flush-to-zero
Aurelien Jarno
1
-0
/
+1
2011-01-14
target-sh4: define FPSCR constants
Aurelien Jarno
1
-2
/
+2
2011-01-14
target-sh4: use default-NaN mode
Aurelien Jarno
1
-0
/
+1
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