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authorAurelien Jarno <aurelien@aurel32.net>2012-01-07 15:20:12 +0100
committerAurelien Jarno <aurelien@aurel32.net>2012-01-10 18:20:10 +0100
commit0cdb95549fedc73e13c147ab9dcabcc303426a07 (patch)
treee57262970370ab760dc72b6022810bdc0d0c8a9c /target-sh4/translate.c
parent05b922dd0a1919c265361ca62902d6cdaea4cc36 (diff)
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target-sh4: ignore ocbp and ocbwb instructions
ocbp and ocbwb controls the writeback of a cache line to memory. They are supposed to do nothing in case of a cache miss. Given QEMU only partially emulate caches, it is safe to ignore these instructions. This fixes a kernel oops when trying to access an rtl8139 NIC with recent versions. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-sh4/translate.c')
-rw-r--r--target-sh4/translate.c14
1 files changed, 3 insertions, 11 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 2ecb236..aacf96d 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1652,18 +1652,10 @@ static void _decode_opc(DisasContext * ctx)
}
return;
case 0x00a3: /* ocbp @Rn */
- {
- TCGv dummy = tcg_temp_new();
- tcg_gen_qemu_ld32s(dummy, REG(B11_8), ctx->memidx);
- tcg_temp_free(dummy);
- }
- return;
case 0x00b3: /* ocbwb @Rn */
- {
- TCGv dummy = tcg_temp_new();
- tcg_gen_qemu_ld32s(dummy, REG(B11_8), ctx->memidx);
- tcg_temp_free(dummy);
- }
+ /* These instructions are supposed to do nothing in case of
+ a cache miss. Given that we only partially emulate caches
+ it is safe to simply ignore them. */
return;
case 0x0083: /* pref @Rn */
return;