| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2015-07-09 | cpu-exec: Purge all uses of ENV_GET_CPU() | Peter Crosthwaite | 1 | -1/+1 |
| 2015-04-28 | Convert (ffs(val) - 1) to ctz32(val) | Stefan Hajnoczi | 1 | -2/+2 |
| 2015-03-10 | cpu: Make cpu_init() return QOM CPUState object | Eduardo Habkost | 1 | -8/+1 |
| 2015-03-09 | PPC: Introduce the Virtual Time Base (VTB) SPR register | Cyril Bur | 1 | -0/+1 |
| 2015-03-09 | target-ppc: Use right page size with hash table lookup | Aneesh Kumar K.V | 1 | -0/+1 |
| 2015-01-20 | exec.c: Drop TARGET_HAS_ICE define and checks | Peter Maydell | 1 | -2/+0 |
| 2015-01-10 | Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int... | Peter Maydell | 1 | -1/+25 |
| 2015-01-07 | target-ppc: Introduce TEXASRU Bit Fields | Tom Musta | 1 | -0/+20 |
| 2015-01-07 | target-ppc: Introduce Feature Flag for Transactional Memory | Tom Musta | 1 | -0/+2 |
| 2015-01-07 | target-ppc: Introduce Instruction Type for Transactional Memory | Tom Musta | 1 | -1/+3 |
| 2014-12-23 | target-ppc: pass DisasContext to SPR generator functions | Paolo Bonzini | 1 | -6/+7 |
| 2014-11-04 | target-ppc: Use macros in opcodes table handling code | Bharata B Rao | 1 | -1/+2 |
| 2014-11-04 | target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 | Pierre Mallard | 1 | -1/+4 |
| 2014-09-25 | target-ppc: Use cpu_exec_interrupt qom hook | Richard Henderson | 1 | -1/+0 |
| 2014-06-29 | target-ppc: enable virtio endian ambivalent support | Greg Kurz | 1 | -0/+2 |
| 2014-06-27 | target-ppc: Add DFP to Emulated Instructions Flag | Tom Musta | 1 | -1/+1 |
| 2014-06-16 | spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODE | Alexey Kardashevskiy | 1 | -1/+3 |
| 2014-06-16 | target-ppc: Add POWER8's Event Based Branch (EBB) control SPRs | Alexey Kardashevskiy | 1 | -0/+7 |
| 2014-06-16 | KVM: target-ppc: Enable TM state migration | Alexey Kardashevskiy | 1 | -0/+14 |
| 2014-06-16 | target-ppc: Add POWER8's TM SPRs | Alexey Kardashevskiy | 1 | -0/+10 |
| 2014-06-16 | target-ppc: Add POWER8's MMCR2/MMCRS SPRs | Alexey Kardashevskiy | 1 | -0/+3 |
| 2014-06-16 | target-ppc: Add POWER8's FSCR SPR | Alexey Kardashevskiy | 1 | -0/+16 |
| 2014-06-16 | target-ppc: Add POWER8's TIR SPR | Alexey Kardashevskiy | 1 | -0/+1 |
| 2014-06-16 | target-ppc: Add HID4 SPR for PPC970 | Alexey Kardashevskiy | 1 | -0/+1 |
| 2014-06-16 | target-ppc: Add PMC7/8 to 970 class | Alexey Kardashevskiy | 1 | -0/+4 |
| 2014-06-16 | target-ppc: Add "POWER" prefix to MMCRA PMU registers | Alexey Kardashevskiy | 1 | -1/+2 |
| 2014-06-16 | target-ppc: Copy and split gen_spr_7xx() for 970 | Alexey Kardashevskiy | 1 | -0/+20 |
| 2014-06-16 | target-ppc: Merge 970FX and 970MP into a single 970 class | Alexey Kardashevskiy | 1 | -0/+5 |
| 2014-06-16 | target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs | Alexey Kardashevskiy | 1 | -20/+20 |
| 2014-06-16 | PPC: e500: Merge 32 and 64 bit SPE emulation | Alexander Graf | 1 | -4/+0 |
| 2014-06-16 | spapr: Limit threads per core according to current compatibility mode | Alexey Kardashevskiy | 1 | -0/+1 |
| 2014-06-16 | target-ppc: Implement "compat" CPU option | Alexey Kardashevskiy | 1 | -0/+11 |
| 2014-06-16 | PPC: Properly emulate L1CSR0 and L1CSR1 | Alexander Graf | 1 | -0/+12 |
| 2014-06-16 | PPC: Add L1CFG1 SPR emulation | Alexander Graf | 1 | -0/+1 |
| 2014-06-16 | PPC: Add definitions for GIVORs | Alexander Graf | 1 | -0/+6 |
| 2014-05-13 | cpu: make CPU_INTERRUPT_RESET available on all targets | Paolo Bonzini | 1 | -3/+0 |
| 2014-04-08 | PPC: Clean up DECR implementation | Alexander Graf | 1 | -0/+1 |
| 2014-03-20 | target-ppc: Introduce powerisa-207-server flag | Alexey Kardashevskiy | 1 | -0/+2 |
| 2014-03-20 | target-ppc: Reset SPRs on CPU reset | Alexey Kardashevskiy | 1 | -0/+1 |
| 2014-03-13 | exec: Change cpu_abort() argument to CPUState | Andreas Färber | 1 | -1/+1 |
| 2014-03-13 | cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook | Andreas Färber | 1 | -2/+2 |
| 2014-03-13 | cpu: Turn cpu_has_work() into a CPUClass hook | Andreas Färber | 1 | -8/+0 |
| 2014-03-05 | target-ppc: add PowerPCCPU::cpu_dt_id | Alexey Kardashevskiy | 1 | -0/+18 |
| 2014-03-05 | target-ppc: Fix htab_mask calculation | Aneesh Kumar K.V | 1 | -0/+1 |
| 2014-03-05 | target-ppc: Altivec 2.07: Update AVR Structure | Tom Musta | 1 | -0/+4 |
| 2014-03-05 | target-ppc: Altivec 2.07: Add Instruction Flag | Tom Musta | 1 | -1/+4 |
| 2014-03-05 | target-ppc: Add Load Quadword and Reserve | Tom Musta | 1 | -0/+1 |
| 2014-03-05 | target-ppc: Add Flag for ISA 2.07 Load/Store Quadword Instructions | Tom Musta | 1 | -1/+3 |
| 2014-03-05 | target-ppc: Add Target Address SPR (TAR) to Power8 | Tom Musta | 1 | -0/+1 |
| 2014-03-05 | target-ppc: Add Flag for bctar | Tom Musta | 1 | -2/+4 |
