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path: root/target-ppc/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2015-09-25ppc: Rename ELF_MACHINE to be PPC specificPeter Crosthwaite1-2/+2
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt1-1/+1
2015-07-09cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite1-1/+1
2015-04-28Convert (ffs(val) - 1) to ctz32(val)Stefan Hajnoczi1-2/+2
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost1-8/+1
2015-03-09PPC: Introduce the Virtual Time Base (VTB) SPR registerCyril Bur1-0/+1
2015-03-09target-ppc: Use right page size with hash table lookupAneesh Kumar K.V1-0/+1
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell1-2/+0
2015-01-10Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int...Peter Maydell1-1/+25
2015-01-07target-ppc: Introduce TEXASRU Bit FieldsTom Musta1-0/+20
2015-01-07target-ppc: Introduce Feature Flag for Transactional MemoryTom Musta1-0/+2
2015-01-07target-ppc: Introduce Instruction Type for Transactional MemoryTom Musta1-1/+3
2014-12-23target-ppc: pass DisasContext to SPR generator functionsPaolo Bonzini1-6/+7
2014-11-04target-ppc: Use macros in opcodes table handling codeBharata B Rao1-1/+2
2014-11-04target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64Pierre Mallard1-1/+4
2014-09-25target-ppc: Use cpu_exec_interrupt qom hookRichard Henderson1-1/+0
2014-06-29target-ppc: enable virtio endian ambivalent supportGreg Kurz1-0/+2
2014-06-27target-ppc: Add DFP to Emulated Instructions FlagTom Musta1-1/+1
2014-06-16spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODEAlexey Kardashevskiy1-1/+3
2014-06-16target-ppc: Add POWER8's Event Based Branch (EBB) control SPRsAlexey Kardashevskiy1-0/+7
2014-06-16KVM: target-ppc: Enable TM state migrationAlexey Kardashevskiy1-0/+14
2014-06-16target-ppc: Add POWER8's TM SPRsAlexey Kardashevskiy1-0/+10
2014-06-16target-ppc: Add POWER8's MMCR2/MMCRS SPRsAlexey Kardashevskiy1-0/+3
2014-06-16target-ppc: Add POWER8's FSCR SPRAlexey Kardashevskiy1-0/+16
2014-06-16target-ppc: Add POWER8's TIR SPRAlexey Kardashevskiy1-0/+1
2014-06-16target-ppc: Add HID4 SPR for PPC970Alexey Kardashevskiy1-0/+1
2014-06-16target-ppc: Add PMC7/8 to 970 classAlexey Kardashevskiy1-0/+4
2014-06-16target-ppc: Add "POWER" prefix to MMCRA PMU registersAlexey Kardashevskiy1-1/+2
2014-06-16target-ppc: Copy and split gen_spr_7xx() for 970Alexey Kardashevskiy1-0/+20
2014-06-16target-ppc: Merge 970FX and 970MP into a single 970 classAlexey Kardashevskiy1-0/+5
2014-06-16target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRsAlexey Kardashevskiy1-20/+20
2014-06-16PPC: e500: Merge 32 and 64 bit SPE emulationAlexander Graf1-4/+0
2014-06-16spapr: Limit threads per core according to current compatibility modeAlexey Kardashevskiy1-0/+1
2014-06-16target-ppc: Implement "compat" CPU optionAlexey Kardashevskiy1-0/+11
2014-06-16PPC: Properly emulate L1CSR0 and L1CSR1Alexander Graf1-0/+12
2014-06-16PPC: Add L1CFG1 SPR emulationAlexander Graf1-0/+1
2014-06-16PPC: Add definitions for GIVORsAlexander Graf1-0/+6
2014-05-13cpu: make CPU_INTERRUPT_RESET available on all targetsPaolo Bonzini1-3/+0
2014-04-08PPC: Clean up DECR implementationAlexander Graf1-0/+1
2014-03-20target-ppc: Introduce powerisa-207-server flagAlexey Kardashevskiy1-0/+2
2014-03-20target-ppc: Reset SPRs on CPU resetAlexey Kardashevskiy1-0/+1
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber1-2/+2
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber1-8/+0
2014-03-05target-ppc: add PowerPCCPU::cpu_dt_idAlexey Kardashevskiy1-0/+18
2014-03-05target-ppc: Fix htab_mask calculationAneesh Kumar K.V1-0/+1
2014-03-05target-ppc: Altivec 2.07: Update AVR StructureTom Musta1-0/+4
2014-03-05target-ppc: Altivec 2.07: Add Instruction FlagTom Musta1-1/+4
2014-03-05target-ppc: Add Load Quadword and ReserveTom Musta1-0/+1
2014-03-05target-ppc: Add Flag for ISA 2.07 Load/Store Quadword InstructionsTom Musta1-1/+3
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