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AgeCommit message (Expand)AuthorFilesLines
2016-05-19cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini7-2/+6
2016-05-19mips: move CP0 functions out of cpu.hPaolo Bonzini2-109/+112
2016-05-19qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini5-17/+23
2016-05-19hw: move CPU state serialization to migration/cpu.hPaolo Bonzini1-1/+1
2016-05-19target-mips: make cpu-qom.h not target specificPaolo Bonzini2-37/+38
2016-05-18Fix some typos found by codespellStefan Weil1-1/+1
2016-05-13Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160513' into stagingPeter Maydell1-1/+1
2016-05-12tcg: Allow goto_tb to any target PC in user modeSergey Fedorov1-5/+15
2016-05-12tb: consistently use uint32_t for tb->flagsEmilio G. Cota1-1/+1
2016-05-12target-mips: fix call to memset in soft reset codeAurelien Jarno1-1/+1
2016-04-28target-mips: Fix RDHWR exception host PCJames Hogan1-8/+8
2016-03-30target-mips: add MAAR, MAARI registerYongbok Kim6-3/+113
2016-03-30target-mips: use CP0_CHECK for gen_m{f|t}hc0Yongbok Kim1-25/+21
2016-03-30target-mips: make ITC Configuration Tags accessible to the CPULeon Alrae4-12/+100
2016-03-30target-mips: check CP0 enabled for CACHE instruction also in R6Leon Alrae1-0/+1
2016-03-30hw/mips: implement ITC Configuration Tags and Storage CellsLeon Alrae1-0/+1
2016-03-30target-mips: enable CM GCR in MIPS64R6-generic CPULeon Alrae1-1/+2
2016-03-30hw/mips_malta: add CPS to Malta boardLeon Alrae2-0/+11
2016-03-30target-mips: add CMGCRBase registerYongbok Kim2-1/+20
2016-03-24Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-0/+1
2016-03-23target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUsLeon Alrae3-9/+17
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster1-0/+1
2016-03-01tcg: Add type for vCPU pointersLluís Vilanova1-1/+1
2016-02-26target-mips: implement R6 multi-threadingYongbok Kim6-1/+147
2016-02-26mips/kvm: Support MSA in MIPS KVM guestsJames Hogan1-20/+109
2016-02-26mips/kvm: Support FPU in MIPS KVM guestsJames Hogan1-4/+117
2016-02-26mips/kvm: Support signed 64-bit KVM registersJames Hogan1-9/+31
2016-02-26mips/kvm: Support unsigned KVM registersJames Hogan1-0/+22
2016-02-26mips/kvm: Implement Config CP0 registersJames Hogan1-0/+106
2016-02-26mips/kvm: Implement PRid CP0 registerJames Hogan1-0/+11
2016-02-26mips/kvm: Remove a couple of noisy DPRINTFsJames Hogan1-2/+0
2016-02-23all: Clean up includesPeter Maydell1-1/+0
2016-02-19target-mips: Stop using uint_fast*_t types in r4k_tlb_t structPeter Maydell1-13/+13
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson1-12/+13
2016-02-03log: do not unnecessarily include qom/cpu.hPaolo Bonzini2-0/+2
2016-01-23mips: Clean up includesPeter Maydell11-9/+11
2016-01-23target-mips: Fix ALIGN instruction when bp=0Miodrag Dinic1-1/+10
2016-01-23target-mips: silence NaNs for cvt.s.d and cvt.d.sAurelien Jarno1-0/+2
2016-01-23target-mips/cpu.h: Fix spell errorDongxue Zhang1-1/+1
2016-01-22fpu: Replace int32 typedef with int32_tPeter Maydell1-12/+12
2016-01-22fpu: Replace uint64 typedef with uint64_tPeter Maydell1-2/+2
2016-01-22fpu: Replace int64 typedef with int64_tPeter Maydell1-6/+6
2015-11-24target-mips: flush QEMU TLB when disabling 64-bit addressingLeon Alrae2-14/+17
2015-11-24target-mips: Fix exceptions while UX=0James Hogan1-0/+12
2015-10-30target-mips: fix updating XContext on mmu exceptionYongbok Kim1-3/+4
2015-10-30target-mips: add SIGRIE instructionYongbok Kim1-1/+11
2015-10-30target-mips: Set Config5.XNP for R6 coresYongbok Kim1-2/+2
2015-10-30target-mips: add PC, XNP reg numbers to RDHWRYongbok Kim4-32/+63
2015-10-29target-mips: Add enum for BREAK32Yongbok Kim1-1/+2
2015-10-29target-mips: update writing to CP0.Status.KX/SX/UX in MIPS Release R6Leon Alrae1-1/+6
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