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target-mips
Age
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Author
Files
Lines
2014-11-07
target-mips: fix multiple TCG registers covering same data
Yongbok Kim
1
-5
/
+3
2014-11-07
mips: Ensure PC update with MTC0 single-stepping
Maciej W. Rozycki
1
-1
/
+1
2014-11-07
target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ
Leon Alrae
1
-0
/
+1
2014-11-07
mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits
Maciej W. Rozycki
1
-3
/
+5
2014-11-07
mips: Add macros for CP0.Config3 and CP0.Config4 bits
Maciej W. Rozycki
1
-0
/
+13
2014-11-07
mips: Respect CP0.Status.CU1 for microMIPS FP branches
Maciej W. Rozycki
1
-2
/
+7
2014-11-03
target-mips: add MSA support to mips32r5-generic
Yongbok Kim
1
-2
/
+2
2014-11-03
target-mips: add MSA MI10 format instructions
Yongbok Kim
3
-5
/
+131
2014-11-03
target-mips: add MSA 2RF format instructions
Yongbok Kim
3
-0
/
+621
2014-11-03
target-mips: add MSA VEC/2R format instructions
Yongbok Kim
3
-0
/
+265
2014-11-03
target-mips: add MSA 3RF format instructions
Yongbok Kim
3
-0
/
+1699
2014-11-03
target-mips: add MSA ELM format instructions
Yongbok Kim
3
-0
/
+290
2014-11-03
target-mips: add MSA 3R format instructions
Yongbok Kim
3
-0
/
+963
2014-11-03
target-mips: add MSA BIT format instructions
Yongbok Kim
3
-0
/
+297
2014-11-03
target-mips: add MSA I5 format instruction
Yongbok Kim
3
-0
/
+232
2014-11-03
target-mips: add MSA I8 format instructions
Yongbok Kim
3
-2
/
+156
2014-11-03
target-mips: add MSA branch instructions
Yongbok Kim
1
-114
/
+220
2014-11-03
target-mips: add msa_helper.c
Yongbok Kim
2
-1
/
+50
2014-11-03
target-mips: add msa_reset(), global msa register
Yongbok Kim
2
-0
/
+90
2014-11-03
target-mips: add MSA opcode enum
Yongbok Kim
1
-0
/
+245
2014-11-03
target-mips: stop translation after ctc1
Yongbok Kim
1
-0
/
+6
2014-11-03
target-mips: remove duplicated mips/ieee mapping function
Yongbok Kim
3
-9
/
+6
2014-11-03
target-mips: add MSA exceptions
Yongbok Kim
1
-0
/
+10
2014-11-03
target-mips: add MSA defines and data structure
Yongbok Kim
3
-2
/
+52
2014-11-03
target-mips: enable features in MIPS64R6-generic CPU
Leon Alrae
1
-2
/
+9
2014-11-03
target-mips: correctly handle access to unimplemented CP0 register
Leon Alrae
1
-278
/
+260
2014-11-03
target-mips: add restrictions for possible values in registers
Leon Alrae
1
-17
/
+53
2014-11-03
target-mips: CP0_Status.CU0 no longer allows the user to access CP0
Leon Alrae
1
-1
/
+2
2014-11-03
target-mips: implement forbidden slot
Leon Alrae
2
-36
/
+76
2014-11-03
target-mips: add Config5.SBRI
Leon Alrae
2
-3
/
+32
2014-11-03
target-mips: update cpu_save/cpu_load to support new registers
Leon Alrae
2
-2
/
+26
2014-11-03
target-mips: add BadInstr and BadInstrP support
Leon Alrae
4
-11
/
+133
2014-11-03
target-mips: add TLBINV support
Leon Alrae
6
-8
/
+92
2014-11-03
target-mips: add new Read-Inhibit and Execute-Inhibit exceptions
Leon Alrae
2
-2
/
+28
2014-11-03
target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}
Leon Alrae
5
-5
/
+57
2014-11-03
target-mips: add RI and XI fields to TLB entry
Leon Alrae
3
-1
/
+29
2014-11-03
target-mips: distinguish between data load and instruction fetch
Leon Alrae
1
-11
/
+10
2014-11-03
target-mips: add KScratch registers
Leon Alrae
2
-0
/
+47
2014-10-24
target-mips: add ULL suffix in bitswap to avoid compiler warning
Leon Alrae
1
-6
/
+6
2014-10-14
target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACX
Peter Maydell
1
-19
/
+1
2014-10-14
target-mips/dsp_helper.c: Add ifdef guards around various functions
Peter Maydell
1
-1
/
+16
2014-10-14
target-mips/translate.c: Add ifdef guard around check_mips64()
Peter Maydell
1
-0
/
+2
2014-10-14
target-mips/op_helper.c: Remove unused do_lbu() function
Peter Maydell
1
-1
/
+0
2014-10-14
target-mips/dsp_helper.c: Remove unused function get_DSPControl_24()
Peter Maydell
1
-9
/
+0
2014-10-14
target-mips: fix broken MIPS16 and microMIPS
Yongbok Kim
2
-188
/
+123
2014-10-14
target-mips/translate.c: Update OPC_SYNCI
Dongxue Zhang
1
-1
/
+6
2014-10-14
target-mips: define a new generic CPU supporting MIPS64 Release 6 ISA
Leon Alrae
1
-0
/
+30
2014-10-14
target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructions
Yongbok Kim
1
-2
/
+16
2014-10-14
target-mips: do not allow Status.FR=0 mode in 64-bit FPU
Leon Alrae
1
-0
/
+6
2014-10-14
target-mips: add new Floating Point Comparison instructions
Yongbok Kim
3
-2
/
+342
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