aboutsummaryrefslogtreecommitdiff
path: root/target-mips/gdbstub.c
AgeCommit message (Expand)AuthorFilesLines
2016-06-24target-mips: Implement FCR31's R/W bitmask and related functionalitiesAleksandar Markovic1-5/+3
2016-05-19qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini1-0/+1
2016-01-23mips: Clean up includesPeter Maydell1-1/+1
2014-12-16target-mips: Add missing calls to synchronise SoftFloat statusMaciej W. Rozycki1-5/+3
2014-12-16target-mips: gdbstub: Clean up FPU register handlingMaciej W. Rozycki1-19/+19
2014-12-16target-mips: Correct the writes to Status and Cause registers via gdbstubMaciej W. Rozycki1-2/+6
2014-12-16target-mips: Make CP1.FIR read-only here tooMaciej W. Rozycki1-1/+1
2014-12-16target-mips: Correct the handling of register #72 on writesMaciej W. Rozycki1-1/+1
2014-11-03target-mips: remove duplicated mips/ieee mapping functionYongbok Kim1-7/+0
2013-07-27cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber1-2/+10
2013-07-27gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber1-14/+17
2013-07-26target-mips: Move cpu_gdb_{read,write}_register()Andreas Färber1-0/+144