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target-arm
Age
Commit message (
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Author
Files
Lines
2014-06-24
Fix new typos (found by codespell)
Stefan Weil
1
-1
/
+1
2014-06-19
target-arm: Introduce per-CPU field for PSCI version
Pranavkumar Sawargaonkar
4
-0
/
+9
2014-06-19
target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64
Pranavkumar Sawargaonkar
1
-0
/
+4
2014-06-19
target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible
Pranavkumar Sawargaonkar
2
-0
/
+6
2014-06-19
target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64
Pranavkumar Sawargaonkar
5
-12
/
+44
2014-06-19
target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv()
Peter Maydell
1
-1
/
+1
2014-06-19
target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int()
Peter Maydell
1
-1
/
+2
2014-06-19
target-arm: Add ULL suffix to calculation of page size
Peter Maydell
1
-1
/
+1
2014-06-19
target-arm: implement PD0/PD1 bits for TTBCR
Fabian Aggeler
2
-18
/
+60
2014-06-16
target-arm: Use Common Tables in AES Instructions
Tom Musta
1
-75
/
+4
2014-06-09
target-arm: Delete unused iwmmxt_msadb helper
Peter Maydell
3
-13
/
+0
2014-06-09
target-arm: Fix errors in writes to generic timer control registers
Peter Maydell
1
-3
/
+3
2014-06-09
target-arm: A64: Implement two-register SHA instructions
Peter Maydell
1
-1
/
+44
2014-06-09
target-arm: A64: Implement 3-register SHA instructions
Peter Maydell
1
-1
/
+58
2014-06-09
target-arm: A64: Implement AES instructions
Peter Maydell
1
-1
/
+50
2014-06-09
target-arm: A32/T32: Mask CRC value in calling code, not helper
Peter Maydell
2
-19
/
+16
2014-06-09
target-arm: A64: Implement CRC instructions
Peter Maydell
3
-1
/
+85
2014-06-09
target-arm: VFPv4 implies half-precision extension
Peter Maydell
2
-4
/
+1
2014-06-09
target-arm: Clean up handling of ARMv8 optional feature bits
Peter Maydell
2
-4
/
+14
2014-06-09
target-arm: Remove unnecessary setting of feature bits
Peter Maydell
2
-4
/
+0
2014-06-09
target-arm: arm_any_initfn() should never set ARM_FEATURE_AARCH64
Peter Maydell
1
-3
/
+0
2014-06-09
target-arm: A64: Use PMULL feature bit for PMULL
Peter Maydell
1
-1
/
+1
2014-06-09
target-arm: add support for v8 VMULL.P64 instruction
Peter Maydell
7
-33
/
+60
2014-06-09
target-arm: Allow 3reg_wide undefreq to encode more bad size options
Peter Maydell
1
-12
/
+12
2014-06-09
target-arm: add support for v8 SHA1 and SHA256 instructions
Ard Biesheuvel
5
-7
/
+347
2014-06-09
target-arm: Correct handling of UXN bit in ARMv8 LPAE page tables
Ian Campbell
1
-9
/
+8
2014-06-09
target-arm: Prepare cpreg writefns/readfns for EL3/SecExt
Fabian Aggeler
1
-14
/
+14
2014-06-09
target-arm/cpu64.c: Actually register Cortex-A57 impdef registers
Peter Maydell
1
-0
/
+1
2014-06-05
softmmu: introduce cpu_ldst.h
Paolo Bonzini
3
-4
/
+3
2014-06-05
target-arm: move arm_*_code to a separate file
Paolo Bonzini
5
-22
/
+50
2014-06-05
softmmu: commonize helper definitions
Paolo Bonzini
1
-14
/
+0
2014-05-28
tcg: Invert the inclusion of helper.h
Richard Henderson
9
-16
/
+10
2014-05-27
target-arm: A64: Register VBAR_EL3
Edgar E. Iglesias
2
-1
/
+6
2014-05-27
target-arm: A64: Register VBAR_EL2
Edgar E. Iglesias
2
-1
/
+22
2014-05-27
target-arm: Make vbar_write writeback to any CPREG
Edgar E. Iglesias
1
-1
/
+1
2014-05-27
target-arm: A64: Generalize update_spsel for the various ELs
Edgar E. Iglesias
1
-5
/
+6
2014-05-27
target-arm: A64: Generalize ERET to various ELs
Edgar E. Iglesias
1
-5
/
+6
2014-05-27
target-arm: A64: Trap ERET from EL0 at translation time
Edgar E. Iglesias
1
-0
/
+4
2014-05-27
target-arm: A64: Forbid ERET to higher or unimplemented ELs
Edgar E. Iglesias
1
-2
/
+6
2014-05-27
target-arm: Register EL3 versions of ELR and SPSR
Edgar E. Iglesias
1
-0
/
+16
2014-05-27
target-arm: Register EL2 versions of ELR and SPSR
Edgar E. Iglesias
1
-0
/
+16
2014-05-27
target-arm: Add a feature flag for EL3
Edgar E. Iglesias
1
-0
/
+1
2014-05-27
target-arm: Add a feature flag for EL2
Edgar E. Iglesias
1
-0
/
+1
2014-05-27
target-arm: A64: Introduce aarch64_banked_spsr_index()
Edgar E. Iglesias
3
-2
/
+17
2014-05-27
target-arm: Add SPSR entries for EL2/HYP and EL3/MON
Edgar E. Iglesias
4
-6
/
+12
2014-05-27
target-arm: A64: Add ELR entries for EL2 and 3
Edgar E. Iglesias
2
-4
/
+4
2014-05-27
target-arm: A64: Add SP entries for EL2 and 3
Edgar E. Iglesias
2
-4
/
+4
2014-05-27
target-arm: c12_vbar -> vbar_el[]
Edgar E. Iglesias
3
-5
/
+5
2014-05-27
target-arm: Make esr_el1 an array
Edgar E. Iglesias
3
-8
/
+8
2014-05-27
target-arm: Make elr_el1 an array
Edgar E. Iglesias
6
-10
/
+11
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