| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2013-12-17 | target-arm: A64: add support for bitfield insns | Claudio Fontana | 1 | -2/+54 |
| 2013-12-17 | target-arm: A64: add support for 1-src REV insns | Claudio Fontana | 1 | -1/+72 |
| 2013-12-17 | target-arm: A64: add support for 1-src RBIT insn | Alexander Graf | 3 | -0/+39 |
| 2013-12-17 | target-arm: A64: add support for 1-src data processing and CLZ | Claudio Fontana | 3 | -2/+56 |
| 2013-12-17 | target-arm: A64: add support for 2-src shift reg insns | Alexander Graf | 1 | -0/+22 |
| 2013-12-17 | target-arm: A64: add support for 2-src data processing and DIV | Alexander Graf | 3 | -2/+93 |
| 2013-12-17 | target-arm: A64: add support for EXTR | Alexander Graf | 1 | -2/+47 |
| 2013-12-17 | target-arm: A64: add support for ADR and ADRP | Alexander Graf | 1 | -2/+23 |
| 2013-12-17 | target-arm: A64: add support for logical (shifted register) | Alexander Graf | 1 | -6/+191 |
| 2013-12-17 | target-arm: A64: add support for conditional select | Claudio Fontana | 1 | -2/+65 |
| 2013-12-17 | target-arm: A64: add support for compare and branch imm | Alexander Graf | 1 | -2/+44 |
| 2013-12-17 | target-arm: A64: add support for 'test and branch' imm | Alexander Graf | 1 | -2/+25 |
| 2013-12-17 | target-arm: A64: add support for conditional branches | Alexander Graf | 3 | -7/+38 |
| 2013-12-17 | target-arm: A64: add support for BR, BLR and RET insns | Alexander Graf | 1 | -2/+41 |
| 2013-12-17 | target-arm: A64: add support for B and BL insns | Alexander Graf | 2 | -2/+65 |
| 2013-12-17 | target-arm: A64: expand decoding skeleton for system instructions | Claudio Fontana | 1 | -2/+129 |
| 2013-12-17 | target-arm: A64: provide skeleton for a64 insn decoding | Claudio Fontana | 1 | -8/+362 |
| 2013-12-17 | target-arm: A64: add stubs for a64 specific helpers | Alexander Graf | 4 | -1/+48 |
| 2013-12-17 | target-arm: Support fp registers in gdb stub | Peter Maydell | 1 | -1/+47 |
| 2013-12-17 | target-arm: A64: provide functions for accessing FPCR and FPSR | Peter Maydell | 1 | -0/+28 |
| 2013-12-17 | target-arm: A64: add set_pc cpu method | Alexander Graf | 1 | -0/+11 |
| 2013-12-17 | target-arm: Split A64 from A32/T32 gen_intermediate_code_internal() | Peter Maydell | 3 | -45/+246 |
| 2013-12-17 | target-arm: Add minimal KVM AArch64 support | Mian M. Hamayun | 3 | -0/+209 |
| 2013-12-17 | target-arm: Clean up handling of AArch64 PSTATE | Peter Maydell | 4 | -18/+74 |
| 2013-12-17 | target-arm/kvm: Split 32 bit only code into its own file | Peter Maydell | 3 | -491/+516 |
| 2013-12-17 | ARM: arm_cpu_reset: make it possible to use high vectors for reset_exc | Antony Pavlov | 1 | -0/+5 |
| 2013-12-17 | ARM: cpu: add "reset_hivecs" property | Antony Pavlov | 2 | -0/+14 |
| 2013-12-17 | target-arm/cpu: Convert reset CBAR to a property | Peter Crosthwaite | 1 | -0/+17 |
| 2013-12-17 | target-arm: Define and use ARM_FEATURE_CBAR | Peter Crosthwaite | 3 | -9/+13 |
| 2013-12-17 | target-arm/helper.c: Allow cp15.c15 dummy override | Peter Crosthwaite | 1 | -1/+2 |
| 2013-12-17 | target-arm: add support for v8 AES instructions | Ard Biesheuvel | 6 | -0/+313 |
| 2013-12-10 | target-arm: fix TTBCR write masking | Sergey Fedorov | 1 | -1/+1 |
| 2013-12-10 | target-arm: Use new qemu_ld/st opcodes | Richard Henderson | 1 | -31/+25 |
| 2013-12-10 | target-arm: Implement ARMv8 SIMD VMAXNM and VMINNM instructions. | Will Newton | 1 | -9/+22 |
| 2013-12-10 | target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions. | Will Newton | 3 | -0/+80 |
| 2013-12-10 | target-arm: Implement ARMv8 VSEL instruction. | Will Newton | 1 | -1/+134 |
| 2013-12-10 | target-arm: Move call to disas_vfp_insn out of disas_coproc_insn. | Will Newton | 1 | -5/+27 |
| 2013-12-10 | target-arm: Provide '-cpu host' when running KVM | Peter Maydell | 3 | -0/+285 |
| 2013-12-10 | target-arm: Don't hardcode KVM target CPU to be A15 | Peter Maydell | 4 | -1/+24 |
| 2013-12-10 | target-arm: Allow secondary KVM CPUs to be booted via PSCI | Peter Maydell | 3 | -0/+13 |
| 2013-12-10 | target-arm: Add ARMCPU field for Linux device-tree 'compatible' string | Peter Maydell | 2 | -0/+53 |
| 2013-12-10 | target-arm: Provide PSCI constants to generic QEMU code | Peter Maydell | 1 | -0/+12 |
| 2013-12-10 | target-arm: Provide mechanism for getting KVM constants even if not CONFIG_KVM | Peter Maydell | 3 | -20/+43 |
| 2013-10-31 | target-arm: fix sorting issue of KVM cpreg list | Alvise Rigo | 1 | -1/+7 |
| 2013-10-31 | target-arm: sort TCG cpreg list by KVM-style 64 bit ID number | Alvise Rigo | 1 | -3/+9 |
| 2013-10-31 | target-arm: Add CP15 VBAR support | Nathan Rossi | 2 | -0/+22 |
| 2013-10-18 | Merge remote-tracking branch 'bonzini/configure' into staging | Anthony Liguori | 1 | -1/+1 |
| 2013-10-16 | Makefile.target: CONFIG_NO_* variables removed | Ákos Kovács | 1 | -1/+1 |
| 2013-10-11 | Merge remote-tracking branch 'rth/tcg-pull' into staging | Anthony Liguori | 2 | -7/+4 |
| 2013-10-10 | Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging | Anthony Liguori | 1 | -3/+0 |
