aboutsummaryrefslogtreecommitdiff
path: root/include/hw/arm
AgeCommit message (Expand)AuthorFilesLines
2022-03-18hw/arm/xlnx-zynqmp: Connect the ZynqMP APU ControlEdgar E. Iglesias1-1/+3
2022-03-18hw/arm/xlnx-zynqmp: Connect the ZynqMP CRFEdgar E. Iglesias1-0/+2
2022-03-18hw/arm/xlnx-zynqmp: Add an unimplemented SERDES areaEdgar E. Iglesias1-1/+1
2022-03-07hw/arm/virt: Disable LPA2 for -machine virt-6.2Richard Henderson1-0/+1
2022-02-26ast2600: Add Secure Boot Controller modelJoel Stanley1-0/+3
2022-02-08hw/arm/boot: Drop nb_cpus field from arm_boot_infoPeter Maydell1-1/+0
2022-02-08hw/arm/boot: Don't write secondary boot stub if using PSCIPeter Maydell1-0/+3
2022-02-08hw/arm/versal: Let boot.c handle PSCI enablementPeter Maydell1-1/+0
2022-02-08hw/arm/boot: Support setting psci-conduit based on guest ELPeter Maydell1-0/+10
2022-02-08hw/arm/xlnx-zynqmp: 'Or' the QSPI / QSPI DMA IRQsFrancisco Iglesias1-0/+2
2022-01-28hw/arm/xlnx-versal: Connect the OSPI flash memory controller modelFrancisco Iglesias1-0/+20
2022-01-28hw/arm/xlnx-versal: Connect Versal's PMC SLCRFrancisco Iglesias1-0/+5
2022-01-28hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC modelsFrancisco Iglesias1-2/+3
2022-01-20hw/arm/aspeed: Add the i3c device to the AST2600 SoCTroy Lee1-0/+3
2022-01-20hw/arm/virt: Add a control for the the highmem redistributorsMarc Zyngier1-1/+3
2022-01-20hw/arm/virt: Add a control for the the highmem PCIe MMIOMarc Zyngier1-0/+1
2022-01-18hw/arm: add control knob to disable kaslr_seed via DTBAlex Bennée1-0/+1
2022-01-07Add dummy Aspeed AST2600 Display Port MCU (DPMCU)Troy Lee1-0/+2
2021-11-02hw/arm: Add Nuvoton SD module to boardShengtan Mao1-0/+2
2021-10-20hw/arm/virt: Only describe cpu topology since virt-6.2Yanan Wang1-1/+3
2021-10-12hw/arm: Integrate ADC model into Aspeed SoCAndrew Jeffery1-0/+2
2021-09-30hw/arm: xlnx-zcu102: Add Xilinx eFUSE deviceTong Ho1-0/+3
2021-09-30hw/arm: xlnx-zcu102: Add Xilinx BBRAM deviceTong Ho1-0/+2
2021-09-30hw/arm: xlnx-versal-virt: Add Xilinx eFUSE deviceTong Ho1-0/+10
2021-09-30hw/arm: xlnx-versal-virt: Add Xilinx BBRAM deviceTong Ho1-0/+5
2021-09-20hw/arm/aspeed: Allow machine to set UART defaultPeter Delevoryas2-0/+2
2021-09-13hw/arm/virt: add ITS support in virt GICShashi Mallela1-0/+2
2021-09-01hw/arm/msf2-soc: Wire up refclkPeter Maydell1-0/+1
2021-09-01hw/arm/msf2: Use Clock input to MSF2_SOC instead of m3clk propertyPeter Maydell1-1/+2
2021-09-01hw/arm/msf2_soc: Don't allocate separate MemoryRegionsPeter Maydell1-0/+4
2021-09-01hw/arm/nrf51: Wire up sysclkPeter Maydell1-0/+2
2021-09-01hw/arm/stm32f405: Wire up sysclk and refclkPeter Maydell1-0/+3
2021-09-01hw/arm/stm32f205: Wire up sysclk and refclkPeter Maydell1-0/+4
2021-09-01hw/arm/stm32f100: Wire up sysclk and refclkPeter Maydell1-0/+4
2021-09-01hw/arm: Don't allocate separate MemoryRegions in stm32 SoC realizePeter Maydell2-0/+8
2021-09-01hw/arm/armv7m: Create input clocksPeter Maydell1-0/+6
2021-09-01arm: Move system PPB container handling to armv7mPeter Maydell1-0/+4
2021-09-01arm: Move systick device creation from NVIC to ARMv7M objectPeter Maydell1-0/+12
2021-09-01arm: Move M-profile RAS register block into its own devicePeter Maydell1-0/+2
2021-08-26hw/arm/xlnx-zynqmp: Add unimplemented APU mmioTong Ho1-0/+7
2021-08-26hw/arm/xlnx-versal: Add unimplemented APU mmioTong Ho1-0/+2
2021-08-25fsl-imx7: Instantiate SAI1/2/3 as unimplemented devicesGuenter Roeck1-0/+5
2021-07-16hw/arm/virt: Add default_bus_bypass_iommu machine optionXingang Wang1-0/+1
2021-07-09stm32f100: Add the stm32f100 SoCAlexandre Iooss1-0/+57
2021-07-02hw/arm: Add basic power management to raspi.Nolan Leake1-1/+2
2021-06-03arm: Consistently use "Cortex-Axx", not "Cortex Axx"Peter Maydell1-1/+1
2021-06-03target/arm: Allow board models to specify initial NS VTORPeter Maydell1-0/+2
2021-05-25hw/arm: Model TCMs in the SSE-300, not the AN547Peter Maydell1-0/+2
2021-05-01aspeed: Integrate HACEJoel Stanley1-0/+3
2021-03-19hw: Replace anti-social QOM type namesMarkus Armbruster7-7/+7