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path: root/hw/pci-bridge/cxl_upstream.c
AgeCommit message (Expand)AuthorFilesLines
2024-12-19include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LISTRichard Henderson1-1/+0
2024-12-15hw/pci-bridge: Constify all PropertyRichard Henderson1-1/+1
2024-11-04hw/pci-bridge/cxl-upstream: Add properties to control link speed and widthJonathan Cameron1-0/+6
2024-09-13hw: Use device_class_set_legacy_reset() instead of opencodingPeter Maydell1-1/+1
2024-09-10qapi/machine: Drop temporary 'prefix'Markus Armbruster1-2/+2
2024-04-25hw/cxl/cxl-cdat: Make cxl_doe_cdat_init() return booleanZhao Liu1-2/+1
2024-03-12hw/pci-bridge/cxl_upstream: Fix missing ERRP_GUARD() in cxl_usp_realize()Zhao Liu1-0/+1
2024-03-09hw/pci-bridge/cxl_upstream: Fix problem with g_steal_pointer()Thomas Huth1-4/+4
2024-02-14hw/cxl: Standardize all references on CXL r3.1 and minor updatesJonathan Cameron1-2/+2
2024-02-14hw/pci-bridge/cxl_upstream: Drop g_malloc() failure handlingJonathan Cameron1-6/+0
2023-11-07hw/pci-bridge/cxl_upstream: Move defintion of device to header.Jonathan Cameron1-10/+1
2023-11-07hw/cxl: CXLDVSECPortExtensions renamed to CXLDVSECPortExtJonathan Cameron1-1/+1
2023-10-04hw/pci-bridge/cxl-upstream: Add serial number extended capability supportJonathan Cameron1-2/+13
2023-09-21hw/pci-bridge/cxl_upstream: Fix bandwidth entry base unit for SSLBISDave Jiang1-1/+1
2023-08-03hw/pci-bridge/cxl_upstream.c: Use g_new0() in build_cdat_table()Peter Maydell1-4/+1
2023-05-19hw/cxl: cdat: Fix failure to free buffer in erorr pathsJonathan Cameron1-0/+3
2022-12-21pci: drop redundant PCIDeviceClass::is_bridge fieldIgor Mammedov1-1/+0
2022-11-07hw/pci-bridge/cxl-upstream: Add a CDAT table access DOEJonathan Cameron1-1/+194
2022-06-16pci-bridge/cxl_upstream: Add a CXL switch upstream portJonathan Cameron1-0/+216
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