aboutsummaryrefslogtreecommitdiff
path: root/hw/mips
AgeCommit message (Collapse)AuthorFilesLines
5 daysMerge tag 'exec-20241220' of https://github.com/philmd/qemu into stagingStefan Hajnoczi8-25/+25
Accel & Exec patch queue - Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h" # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t # wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt # KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K # A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 # 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// # 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r # xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl # VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay # ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP # 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd # +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 # x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= # =cjz8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Dec 2024 11:45:20 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'exec-20241220' of https://github.com/philmd/qemu: (59 commits) util/qemu-timer: fix indentation meson: Do not define CONFIG_DEVICES on user emulation system/accel-ops: Remove unnecessary 'exec/cpu-common.h' header system/numa: Remove unnecessary 'exec/cpu-common.h' header hw/xen: Remove unnecessary 'exec/cpu-common.h' header target/mips: Drop left-over comment about Jazz machine target/mips: Remove tswap() calls in semihosting uhi_fstat_cb() target/xtensa: Remove tswap() calls in semihosting simcall() helper accel/tcg: Un-inline translator_is_same_page() accel/tcg: Include missing 'exec/translation-block.h' header accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h' accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h' qemu/coroutine: Include missing 'qemu/atomic.h' header exec/translation-block: Include missing 'qemu/atomic.h' header accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h' exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined target/sparc: Move sparc_restore_state_to_opc() to cpu.c target/sparc: Uninline cpu_get_tb_cpu_state() target/loongarch: Declare loongarch_cpu_dump_state() locally user: Move various declarations out of 'exec/exec-all.h' ... Conflicts: hw/char/riscv_htif.c hw/intc/riscv_aplic.c target/s390x/cpu.c Apply sysemu header path changes to not in the pull request. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
6 daysinclude: Rename sysemu/ -> system/Philippe Mathieu-Daudé8-25/+25
Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer. Files renamed manually then mechanical change using sed tool. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Lei Yang <leiyang@redhat.com> Message-Id: <20241203172445.28576-1-philmd@linaro.org>
7 daysinclude/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LISTRichard Henderson1-1/+0
Now that all of the Property arrays are counted, we can remove the terminator object from each array. Update the assertions in device_class_set_props to match. With struct Property being 88 bytes, this was a rather large form of terminator. Saves 30k from qemu-system-aarch64. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Lei Yang <leiyang@redhat.com> Link: https://lore.kernel.org/r/20241218134251.4724-21-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
11 dayshw/mips: Constify all PropertyRichard Henderson1-1/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
13 dayshw/mips: Include missing 'exec/tswap.h' headerPhilippe Mathieu-Daudé2-0/+2
Some files indirectly get "exec/tswap.h" declarations via "exec/cpu-all.h". Include it directly to be able to remove the former from the latter, otherwise we get: hw/mips/malta.c:674:22: error: call to undeclared function 'tswap32'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 674 | tswap32((1 << 31) /* ConfigEn */ | ^ hw/mips/fuloong2e.c:89:23: error: call to undeclared function 'tswap32'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 89 | prom_buf[index] = tswap32(ENVP_VADDR + table_addr); | ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241211230357.97036-7-philmd@linaro.org>
2024-10-15hw/mips: Have mips_cpu_create_with_clock() take an endianness argumentPhilippe Mathieu-Daudé5-5/+8
mips_cpu_create_with_clock() creates a vCPU. Pass it the vCPU endianness requested by argument. Update the board call sites. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241010215015.44326-17-philmd@linaro.org>
2024-10-15hw/mips/cps: Set the vCPU 'cpu-big-endian' propertyPhilippe Mathieu-Daudé2-0/+6
Have the CPS expose a 'cpu-big-endian' property so it can set it to the vCPUs it creates. Note, since the number of vCPUs created is dynamic, we can not use QOM aliases. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241010215015.44326-16-philmd@linaro.org>
2024-10-04Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingPeter Maydell6-10/+10
* pc: Add a description for the i8042 property * kvm: support for nested FRED * tests/unit: fix warning when compiling test-nested-aio-poll with LTO * kvm: refactoring of VM creation * target/i386: expose IBPB-BRTYPE and SBPB CPUID bits to the guest * hw/char: clean up serial * remove virtfs-proxy-helper * target/i386/kvm: Report which action failed in kvm_arch_put/get_registers * qom: improvements to object_resolve_path*() # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmb++MsUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroPVnwf/cdvfxvDm22tEdlh8vHlV17HtVdcC # Hw334M/3PDvbTmGzPBg26lzo4nFS6SLrZ8ETCeqvuJrtKzqVk9bI8ssZW5KA4ijM # nkxguRPHO8E6U33ZSucc+Hn56+bAx4I2X80dLKXJ87OsbMffIeJ6aHGSEI1+fKVh # pK7q53+Y3lQWuRBGhDIyKNuzqU4g+irpQwXOhux63bV3ADadmsqzExP6Gmtl8OKM # DylPu1oK7EPZumlSiJa7Gy1xBqL4Rc4wGPNYx2RVRjp+i7W2/Y1uehm3wSBw+SXC # a6b7SvLoYfWYS14/qCF4cBL3sJH/0f/4g8ZAhDDxi2i5kBr0/5oioDyE/A== # =/zo4 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 03 Oct 2024 21:04:27 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (23 commits) qom: update object_resolve_path*() documentation qom: set *ambiguous on all paths qom: rename object_resolve_path_type() "ambiguousp" target/i386/kvm: Report which action failed in kvm_arch_put/get_registers kvm: Allow kvm_arch_get/put_registers to accept Error** accel/kvm: refactor dirty ring setup minikconf: print error entirely on stderr 9p: remove 'proxy' filesystem backend driver hw/char: Extract serial-mm hw/char/serial.h: Extract serial-isa.h hw: Remove unused inclusion of hw/char/serial.h target/i386: Expose IBPB-BRTYPE and SBPB CPUID bits to the guest kvm: refactor core virtual machine creation into its own function kvm/i386: replace identity_base variable with a constant kvm/i386: refactor kvm_arch_init and split it into smaller functions kvm: replace fprintf with error_report()/printf() in kvm_init() kvm/i386: fix return values of is_host_cpu_intel() kvm/i386: make kvm_filter_msr() and related definitions private to kvm module hw/i386/pc: Add a description for the i8042 property tests/unit: remove block layer code from test-nested-aio-poll ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/arm/Kconfig # hw/arm/pxa2xx.c
2024-10-03hw/char: Extract serial-mmBernhard Beschow6-10/+10
hw/char/serial currently contains the implementation of both TYPE_SERIAL and TYPE_SERIAL_MM. According to serial_class_init(), TYPE_SERIAL is an internal class while TYPE_SERIAL_MM is used by numerous machine types directly. Let's move the latter into its own module which makes the dependencies more obvious and the code more tidy. The includes and the dependencies have been converted mechanically except in the hw/char directories which were updated manually. The result was compile-tested. Now, only hw/char makes direct use of TYPE_SERIAL: # grep -r -e "select SERIAL" | grep -v SERIAL_ hw/char/Kconfig: select SERIAL hw/char/Kconfig: select SERIAL hw/char/Kconfig: select SERIAL hw/char/Kconfig: select SERIAL hw/char/Kconfig: select SERIAL # grep -r -e "/serial\\.h" include/hw/char/serial-mm.h:#include "hw/char/serial.h" hw/char/serial-pci-multi.c:#include "hw/char/serial.h" hw/char/serial.c:#include "hw/char/serial.h" hw/char/serial-isa.c:#include "hw/char/serial.h" hw/char/serial-pci.c:#include "hw/char/serial.h" Tested-by: Andrew Jeffery <andrew@codeconstruct.com.au> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Link: https://lore.kernel.org/r/20240905073832.16222-4-shentey@gmail.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-10-03hw/mips: Build fw_cfg.c oncePhilippe Mathieu-Daudé1-1/+1
Nothing in fw_cfg.c requires target-specific knowledge, build it once for the 4 MIPS variants. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-09-20hw/mips/jazz: fix typo in in-built NIC aliasMark Cave-Ayland1-1/+1
Commit e104edbb9d ("hw/mips/jazz: use qemu_find_nic_info()") contained a typo in the NIC alias which caused initialisation of the in-built dp83932 NIC to fail when using the normal -nic user,model=dp83932 command line. Fixes: e104edbb9d ("hw/mips/jazz: use qemu_find_nic_info()") Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-08-20hw/mips/loongson3_virt: Fix condition of IPI IOCSR connectionJiaxun Yang1-1/+1
>>> CID 1547264: Null pointer dereferences (REVERSE_INULL) >>> Null-checking "ipi" suggests that it may be null, but it has already been dereferenced on all paths leading to the check. Resolves: Coverity CID 1547264 Link: https://lore.kernel.org/qemu-devel/752417ad-ab72-4fed-8d1f-af41f15bc225@app.fastmail.com/ Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240621-loongson3-ipi-follow-v2-2-848eafcbb67e@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-08-20hw/mips/loongson3_virt: Store core_iocsr into LoongsonMachineStateJiaxun Yang1-0/+3
Link: https://lore.kernel.org/qemu-devel/972034d6-23b3-415a-b401-b8bc1cc515c9@linaro.org/ Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240621-loongson3-ipi-follow-v2-1-848eafcbb67e@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-07-23hw/mips/loongson3_virt: remove useless type castYao Xingtao1-2/+2
The type of kernel_entry, kernel_low and kernel_high is uint64_t, cast the pointer of this type to uint64_t* is useless. Signed-off-by: Yao Xingtao <yaoxt.fnst@fujitsu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240722091728.4334-2-yaoxt.fnst@fujitsu.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-07-16hw/isa/vt82c686: Turn "intr" irq into a named gpioBernhard Beschow1-1/+1
Makes the code more comprehensible, matches the datasheet and the piix4 device model. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240704205854.18537-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-06-19hw/mips/loongson3_virt: Wire up loongson_ipi deviceJiaxun Yang4-4/+41
Wire up loongson_ipi device for loongson3_virt machine, so we can have SMP support for TCG backend as well. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Acked-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240605-loongson3-ipi-v3-3-ddd2c0e03fa3@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-06-05hw/mips/malta: Add re-usable rng_seed_hex_new() methodPhilippe Mathieu-Daudé1-12/+13
sprintf() is deprecated on Darwin since macOS 13.0 / XCode 14.1. Extract common code from reinitialize_rng_seed and load_kernel to rng_seed_hex_new. Using qemu_hexdump_line both fixes the deprecation warning and simplifies the code base. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> [rth: Use qemu_hexdump_line.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240412073346.458116-7-richard.henderson@linaro.org>
2024-05-10kconfig: express dependency of individual boards on libfdtPaolo Bonzini1-1/+2
Now that boards are enabled by default and the "CONFIG_FOO=y" entries are gone from configs/devices/, there cannot be any more a conflicts between the default contents of configs/devices/ and a failed "depends on" clause. With this change, each individual board or target can express whether it needs FDT. It can then include the common code in the build via "select DEVICE_TREE", which will also as tell meson to link with libfdt. This allows building non-microvm x86 emulators without having libfdt available. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-10meson: pick libfdt from common_ss when building target-specific filesPaolo Bonzini1-1/+1
Avoid having to list dependencies such as libfdt twice, both on common_ss and specific_ss. Instead, just take all the dependencies in common_ss and allow the target-specific libqemu-*.fa library to use them. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-05-09hw/mips/loongson3_virt: Emulate suspend functionJiaxun Yang2-0/+21
Suspend function is emulated as what hardware actually do. Doorbell register fields are updates to include suspend value, suspend vector is encoded in firmware blob and fw_cfg is updated to include S3 bits as what x86 did. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-ID: <20240508-loongson3v-suspend-v1-1-186725524a39@flygoat.com> [PMD: Use g_memdup2(), constify suspend array] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-05-03mips: switch boards to "default y"Paolo Bonzini1-0/+12
Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with MIPS. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-03-08mips: do not list individual devices from configs/Paolo Bonzini1-1/+19
Add new "select" and "imply" directives if needed. The resulting config-devices.mak files are the same as before. Builds without default devices will become much smaller than before, and qtests fail (as expected, though suboptimal) for mips64-softmmu because most tests do not use -nodefaults, so remove it from build-without-defaults Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-02-27hw/mips/loongson3_virt: do not require CONFIG_USBPaolo Bonzini1-2/+6
Once the Kconfig for hw/mips is cleaned up, it will be possible to build a binary that does not include any USB host controller and therefore that does not include the code guarded by CONFIG_USB. While the simpler creation functions such as usb_create_simple can be inlined, this is not true of usb_bus_find(). Remove it, replacing it with a search of the single USB bus created by loongson3_virt_devices_init(). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20240223124406.234509-5-pbonzini@redhat.com> [PMD: Fixed style] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-22Merge tag 'hw-misc-20240222' of https://github.com/philmd/qemu into stagingPeter Maydell1-1/+2
Misc HW patch queue - Remove sysbus_add_io (Phil) - Build PPC 4xx PCI host bridges once (Phil) - Display QOM path while debugging SMBus targets (Joe) - Simplify x86 PC code (Bernhard) - Remove qemu_[un]register_reset() calls in x86 PC CMOS (Peter) - Fix wiring of ICH9 LPC interrupts (Bernhard) - Split core IDE as device / bus / dma (Thomas) - Prefer QDev API over QOM for devices (Phil) - Fix invalid use of DO_UPCAST() in Leon3 (Thomas) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXXQ1IACgkQ4+MsLN6t # wN4e2xAAig55EJh/JwpdGx55rFUab3Ay22jgXrExmBir8hzhyzssY+RUj2ALRa5e # T26kxCEqiuT549FtWm/ci6kVax0QD6bqz/6/j451XB9469Z/3BDOV5rhsqF6zlr5 # BMbyC8PKnMUluG8v1ZuRjC3m2lK3ZvkVnZtj7SZUR50ssEnR32fVIziN14/OYkts # 2B24sLrnLBfvyatMRsuFqGWrcbtMdnwNpjenGfDPOTF33W1sxTQ8GSvx1RV32l69 # Yr/iCVoCl+rGxbLLP1TwqtOwzk32p8RsbIt6rWMqVMv/p5F6ezFeiOk7VHnnEJRH # e7TPxt4XeLGPARMQLT3gQh0MGIIodanSHePRBkczuNmKYTJrz+5jMu2Qg4MmMUE/ # TV0fKgdjh/edhAOHzJgZqLmNV71icl8WBjfsw2qT4ZwgJzWq7YM2/XZKkeWhk2nQ # whLxfgiU4PNJ6vHhebJNjOovCYQTK2FbXR+PvVn5FEbH4CuFr8mqkYc+vNYM9dLA # b7uMk1H8kcb5+kqfPPU2lVd1wO7uqhxYOYU2O9nYq8aw7ioLoLeEdj2IicLtrA/H # GMtyA5cYeabeRzSXF30tM2AR1uQ/e4Z7oNxW6z3GVK1NrQtKilqPgMKut8uWYvva # crJLpRQhGiY3sDrIkkCcAHzv256dZaJNLR1KPViaHOyVPZV+x2s= # =+h2O # -----END PGP SIGNATURE----- # gpg: Signature made Thu 22 Feb 2024 12:51:30 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240222' of https://github.com/philmd/qemu: (32 commits) hw/sparc/leon3: Fix wrong usage of DO_UPCAST macro hw/ide: Stop exposing internal.h to non-IDE files hw/ide: Remove the include/hw/ide.h legacy file hw/ide: Move IDE bus related definitions to a new header ide-bus.h hw/ide: Move IDE device related definitions to ide-dev.h hw/ide: Move IDE DMA related definitions to a separate header ide-dma.h hw/ide: Split qdev.c into ide-bus.c and ide-dev.c hw/ide: Add the possibility to disable the CompactFlash device in the build hw/acpi/ich9_tco: Include missing 'migration/vmstate.h' header hw/acpi/cpu: Use CPUState typedef hw/acpi: Include missing 'qapi/qapi-types-acpi.h' generated header hw/isa/meson.build: Sort alphabetically hw/i386/pc_q35: Populate interrupt handlers before realizing LPC PCI function hw/i386/pc_sysfw: Use qdev_is_realized() instead of QOM API hw/i386/pc_sysfw: Inline pc_system_flash_create() and remove it hw/i386/pc: Confine system flash handling to pc_sysfw hw/i386/pc: Defer smbios_set_defaults() to machine_done hw/i386/pc: Merge pc_guest_info_init() into pc_machine_initfn() hw/i386/x86: Turn apic_xrupt_override into class attribute hw/i386/pc: Do pc_cmos_init_late() from pc_machine_done() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # include/hw/i386/pc.h
2024-02-22hw/sysbus: Inline and remove sysbus_add_io()Philippe Mathieu-Daudé1-1/+2
sysbus_add_io(...) is a simple wrapper to memory_region_add_subregion(get_system_io(), ...). It is used in 3 places; inline it directly. Rationale: we want to move to an explicit I/O bus, rather that an implicit one. Besides in heterogeneous setup we can have more than one I/O bus. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20240216150441.45681-1-philmd@linaro.org> [PMD: Include missing "exec/address-spaces.h" header] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-20loongson3: correct typosManos Pitsidianakis1-2/+2
Correct typos automatically found with the `typos` tool <https://crates.io/crates/typos> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-02-15hw/ide/ahci: Pass AHCI context to ahci_ide_create_devs()Philippe Mathieu-Daudé1-1/+1
Since ahci_ide_create_devs() is not PCI specific, pass it an AHCIState argument instead of PCIDevice. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240213081201.78951-6-philmd@linaro.org>
2024-02-15hw/ide/ahci: Inline ahci_get_num_ports()Philippe Mathieu-Daudé1-2/+4
Introduce the 'ich9' variable and inline ahci_get_num_ports(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240213081201.78951-5-philmd@linaro.org>
2024-02-15hw/ide/ahci: Rename AHCI PCI function as 'pdev'Philippe Mathieu-Daudé1-5/+5
We want to access AHCIPCIState::ahci field. In order to keep the code simple (avoiding &ahci->ahci), rename the current 'ahci' variable as 'pdev' Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240213081201.78951-4-philmd@linaro.org>
2024-02-15hw/ide/ahci: Expose AHCIPCIState structurePhilippe Mathieu-Daudé1-1/+1
In order to be able to QOM-embed a structure, we need its full definition. Move it from "ahci_internal.h" to the new "hw/ide/ahci-pci.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240213081201.78951-3-philmd@linaro.org>
2024-02-15hw/dma: Pass parent object to i8257_dma_init()Philippe Mathieu-Daudé1-1/+1
Set I8257 instances parent (migration isn't affected). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240213114426.87836-1-philmd@linaro.org>
2024-02-15hw/isa: extract FDC37M81X to a separate filePaolo Bonzini1-1/+1
isa-superio.c currently defines a SuperIO chip that is not used by any other user of the file. Extract the chip to a separate file. Reviewed-by: Bernhard Beschow <shentey@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20240213155005.109954-7-pbonzini@redhat.com> [PMD: Update MAINTAINERS] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-15hw/mips/Kconfig: Remove ISA dependencies from MIPSsim boardBernhard Beschow2-4/+6
The board doesn't have a working ISA bus, only some I/O space. Selecting ISA_BUS and including hw/isa/isa.h is not necessary. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-ID: <20230109204124.102592-3-shentey@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240213155005.109954-4-pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-15hw/misc/mips_itu: Remove MIPSITUState::cpu0 fieldPhilippe Mathieu-Daudé1-2/+0
Since previous commit the MIPSITUState::cpu0 field is not used anymore. Remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240209090513.9401-6-philmd@linaro.org>
2024-02-15target/mips: Remove MIPSITUState::itu fieldPhilippe Mathieu-Daudé1-1/+0
Previous commits removed the MT*C0(SAAR) helpers which were using CPUMIPSState::itu, we can now remove it too. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240209090513.9401-4-philmd@linaro.org>
2024-02-15hw/mips: remove unnecessary "select PTIMER"Paolo Bonzini1-1/+0
There is no use of ptimer functions in mips_cps.c or any other related code. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240129115811.1039965-1-pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-02-02hw/mips/jazz: use qemu_find_nic_info()David Woodhouse1-8/+7
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
2024-02-02hw/mips/mipssim: use qemu_create_nic_device()David Woodhouse1-6/+7
The MIPS SIM platform instantiates its NIC only if a corresponding configuration exists for it. Use qemu_create_nic_device() function for that. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
2024-02-02hw/mips/loongson3_virt: use pci_init_nic_devices()David Woodhouse1-3/+1
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
2024-02-02hw/mips/malta: use pci_init_nic_devices()David Woodhouse1-12/+3
The Malta board setup code would previously place the first NIC into PCI slot 11 if was a PCNet card, and the rest (including the first if it was anything other than a PCNet card) would be dynamically assigned. Now it will place any PCNet NIC into slot 11, and then anything else will be dynamically assigned. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
2024-02-02hw/mips/fuloong2e: use pci_init_nic_devices()David Woodhouse1-13/+3
The previous behaviour was: *if* the first NIC specified on the command line was an RTL8139 (or unspecified model) then it gets assigned to PCI slot 7, which is where the Fuloong board had an RTL8139. All other devices (including the first, if it was specified as anything other than an rtl8319) get dynamically assigned on the bus. The new behaviour is subtly different: If the first NIC was given a specific model *other* than rtl8139, and a subsequent NIC was not, then the rtl8139 (or unspecified) NIC will go to slot 7 and the rest will be dynamically assigned. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
2024-01-08qemu/main-loop: rename QEMU_IOTHREAD_LOCK_GUARD to BQL_LOCK_GUARDStefan Hajnoczi1-1/+1
The name "iothread" is overloaded. Use the term Big QEMU Lock (BQL) instead, it is already widely used and unambiguous. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Paul Durrant <paul@xen.org> Acked-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-id: 20240102153529.486531-3-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2024-01-05hw/mips: Inline 'bios.h' definitionsPhilippe Mathieu-Daudé3-3/+26
There is no universal BIOS, each machine needs a specific one. Move the machine-specific definitions to each machine code and remove this bogus header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231122184334.18201-1-philmd@linaro.org>
2024-01-05hw: Simplify accesses to the CPUState::'start-powered-off' propertyPhilippe Mathieu-Daudé1-4/+3
The 'start-powered-off' property has been added to ARM CPUs in commit 5de164304a ("arm: Allow secondary KVM CPUs to be booted via PSCI"), then eventually got generalized to all CPUs in commit c1b701587e ("target/arm: Move start-powered-off property to generic CPUState"). Since all CPUs have it, no need to check whether it is available. Updating this property can't fail, so use &error_abort. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20231123143813.42632-5-philmd@linaro.org>
2023-12-31meson: rename config_allPaolo Bonzini1-1/+1
config_all now lists only accelerators, rename it to indicate its actual content. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-13hw/mips: LOONGSON3V depends on UNIMP deviceMarc-André Lureau1-0/+1
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Cc: qemu-stable@nongnu.org Fixes: c76b409fef ("hw/mips: Add Loongson-3 machine support") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231107140615.3034763-1-marcandre.lureau@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07hw/mips: FULOONG depends on VT82C686Marc-André Lureau1-0/+1
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-10-23Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Stefan Hajnoczi2-3/+4
into staging virtio,pc,pci: features, cleanups infrastructure for vhost-vdpa shadow work piix south bridge rework reconnect for vhost-user-scsi dummy ACPI QTG DSM for cxl tests, cleanups, fixes all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmU06PMPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpNIsH/0DlKti86VZLJ6PbNqsnKxoK2gg05TbEhPZU # pQ+RPDaCHpFBsLC5qsoMJwvaEQFe0e49ZFemw7bXRzBxgmbbNnZ9ArCIPqT+rvQd # 7UBmyC+kacVyybZatq69aK2BHKFtiIRlT78d9Izgtjmp8V7oyKoz14Esh8wkE+FT # ypHUa70Addi6alNm6BVkm7bxZxi0Wrmf3THqF8ViYvufzHKl7JR5e17fKWEG0BqV # 9W7AeHMnzJ7jkTvBGUw7g5EbzFn7hPLTbO4G/VW97k0puS4WRX5aIMkVhUazsRIa # zDOuXCCskUWuRapiCwY0E4g7cCaT8/JR6JjjBaTgkjJgvo5Y8Eg= # =ILek # -----END PGP SIGNATURE----- # gpg: Signature made Sun 22 Oct 2023 02:18:43 PDT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (62 commits) intel-iommu: Report interrupt remapping faults, fix return value MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section vhost-user: Fix protocol feature bit conflict tests/acpi: Update DSDT.cxl with QTG DSM hw/cxl: Add QTG _DSM support for ACPI0017 device tests/acpi: Allow update of DSDT.cxl hw/i386/cxl: ensure maxram is greater than ram size for calculating cxl range vhost-user: fix lost reconnect vhost-user-scsi: start vhost when guest kicks vhost-user-scsi: support reconnect to backend vhost: move and rename the conn retry times vhost-user-common: send get_inflight_fd once hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine hw/isa/piix: Implement multi-process QEMU support also for PIIX4 hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4 hw/isa/piix: Rename functions to be shared for PCI interrupt triggering hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 hw/isa/piix: Share PIIX3's base class with PIIX4 hw/isa/piix: Harmonize names of reset control memory regions ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-10-22hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4Bernhard Beschow1-2/+3
Resolves duplicate code. Also makes PIIX4 respect the PIIX3 properties which get added, too. This allows for using PIIX4 in the PC machine. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20231007123843.127151-25-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-10-22hw/isa/piix3: Merge hw/isa/piix4.cBernhard Beschow1-1/+1
Now that the PIIX3 and PIIX4 device models are sufficiently prepared, their implementations can be merged into one file for further consolidation. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231007123843.127151-20-shentey@gmail.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
generated by cgit v1.1 at 2024-12-27 01:41:19 +0000