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AgeCommit message (Expand)AuthorFilesLines
2023-08-24hw/intc/loongarch_pch: fix edge triggered irq handlingBibo Mao1-1/+6
2023-07-25arm: spelling fixesMichael Tokarev3-4/+4
2023-07-25s390x: spelling fixesMichael Tokarev1-1/+1
2023-07-18s390x: Fix QEMU abort by selecting S390_FLIC_KVMCédric Le Goater1-1/+0
2023-07-07pnv/xive2: Always pass a presenter object when accessing the TIMAFrederic Barrat1-2/+4
2023-07-07pnv/xive: Print CPU target in all TIMA tracesFrederic Barrat2-4/+4
2023-07-07pnv/xive: Allow mmio operations of any size on the ESB CI pagesFrederic Barrat2-6/+6
2023-07-07pnv/xive: Add property on xive sources to define PQ state on resetFrederic Barrat1-2/+6
2023-07-07pnv/xive2: Fix TIMA offset for indirect accessFrederic Barrat1-2/+18
2023-07-07pnv/xive2: Allow indirect TIMA accesses of all sizesFrederic Barrat1-2/+2
2023-06-28hw/intc/arm_gic: Rename 'first_cpu' argumentPhilippe Mathieu-Daudé1-2/+2
2023-06-28hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpersPhilippe Mathieu-Daudé3-0/+33
2023-06-25pnv/xive2: Check TIMA special ops against a dedicated array for P10Frederic Barrat2-41/+43
2023-06-25pnv/xive2: Add a get_config() method on the presenter classFrederic Barrat4-0/+46
2023-06-20meson: Replace softmmu_ss -> system_ssPhilippe Mathieu-Daudé1-22/+22
2023-06-19hw/intc/allwinner-a10-pic: Handle IRQ levels other than 0 or 1Peter Maydell1-1/+1
2023-06-16hw/intc: Set physical cpuid route for LoongArch ipi deviceTianrui Zhao1-7/+37
2023-06-14hw/intc: If mmsiaddrcfgh.L == 1, smsiaddrcfg and smsiaddrcfgh are read-only.Tommy Wu1-2/+2
2023-06-10pnv/xive2: Quiet down some error messagesFrederic Barrat1-0/+4
2023-06-10pnv/xive2: Handle TIMA access through all portsFrederic Barrat2-1/+5
2023-06-10pnv/xive2: Introduce macros to manipulate TIMA addressesFrederic Barrat1-7/+7
2023-06-10pnv/xive2: Allow writes to the Physical Thread Enable registersFrederic Barrat1-0/+1
2023-06-10pnv/xive2: Add definition for the ESB cache configuration registerFrederic Barrat2-0/+11
2023-06-10pnv/xive2: Add definition for TCTXT Config registerFrederic Barrat2-1/+11
2023-06-06Merge tag 'pull-request-2023-06-06' of https://gitlab.com/thuth/qemu into sta...Richard Henderson1-3/+3
2023-06-05bulk: Remove pointless QOM castsPhilippe Mathieu-Daudé1-3/+3
2023-06-05hw/intc/loongarch_ipi: Bring back all 4 IPI mailboxesJiaxun Yang1-3/+3
2023-05-15hw/intc: Add NULL pointer check on LoongArch ipi deviceSong Gao2-11/+30
2023-05-15hw/loongarch/virt: Set max 256 cpus support on loongarch virt machineSong Gao1-2/+2
2023-05-15hw/loongarch/virt: Modify ipi as percpu deviceSong Gao1-28/+16
2023-05-15loongarch: mark loongarch_ipi_iocsr re-entrnacy safeAlexander Bulekov1-0/+4
2023-05-06hw/intc: don't use target_ulong for LoongArch ipiAlex Bennée1-1/+1
2023-05-05hw/intc/riscv_aplic: Zero init APLIC internal stateIvan Klokov1-1/+1
2023-05-02hw/intc/allwinner-a10-pic: Don't use set_bit()/clear_bit()Peter Maydell1-5/+2
2023-04-28apic: disable reentrancy detection for apic-msiAlexander Bulekov1-0/+7
2023-03-22*: Add missing includes of qemu/error-report.hRichard Henderson1-0/+1
2023-03-15hw/intc/ioapic: Update KVM routes before redelivering IRQ, on RTE updateDavid Woodhouse1-2/+1
2023-03-08hw/intc/i8259: Implement legacy LTIM Edge/Level Bank SelectDavid Woodhouse2-7/+27
2023-03-08hw/mips: Declare all length properties as unsignedPhilippe Mathieu-Daudé1-2/+2
2023-03-05hw: intc: Use cpu_by_arch_id to fetch CPU stateMayuresh Chitale3-13/+13
2023-02-27hw/intc/i8259: Document i8259_init()Philippe Mathieu-Daudé1-2/+2
2023-02-27hw: Move ioapic*.h to intc/Bernhard Beschow4-5/+123
2023-02-27hw/intc/armv7m_nvic: Use QOM cast CPU() macroPhilippe Mathieu-Daudé1-3/+3
2023-02-27target/arm: Wrap arm_rebuild_hflags calls with tcg_enabledFabiano Rosas1-7/+13
2023-02-16target/arm: Store CPUARMState::nvic as NVICState*Philippe Mathieu-Daudé1-25/+13
2023-02-03target/arm: Mark up sysregs for HFGRTR bits 36..63Peter Maydell1-0/+2
2023-02-03hvf: arm: Add support for GICv3Alexander Graf1-1/+15
2023-01-20Merge tag 'pull-include-2023-01-20' of https://repo.or.cz/qemu/armbru into st...Peter Maydell2-0/+2
2023-01-20include/hw/ppc: Split pnv_chip.h off pnv.hMarkus Armbruster2-0/+2
2023-01-19Merge tag 'trivial-branch-for-8.0-pull-request' of https://gitlab.com/laurent...Peter Maydell1-6/+6
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