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AgeCommit message (Expand)AuthorFilesLines
2026-01-17meson: Drop host_arch rename for riscv64Richard Henderson1-0/+0
2026-01-17*: Remove ppc host supportRichard Henderson4-214/+212
2026-01-17host/include/x86_64/bufferiszero: Remove no SSE2 fallbackRichard Henderson1-5/+0
2026-01-17*: Remove i386 host supportRichard Henderson8-351/+347
2025-12-05include/aarch64/host: Fix atomic16_fetch_{and,or}Richard Henderson1-6/+6
2025-12-05include/generic/host: Fix atomic128-cas.h.inc for Int128 structureRichard Henderson1-9/+15
2025-09-04cpuinfo/i386: Detect GFNI as an AVX extensionRichard Henderson1-0/+1
2025-08-30qemu/atomic: Add atomic16 primitives for xchg, fetch_and, fetch_orRichard Henderson2-0/+153
2025-08-30qemu/atomic: Finish renaming atomic128-cas.h headersRichard Henderson1-0/+0
2025-03-21host/include/loongarch64: Fix inline assembly compatibility with ClangYao Zi3-5/+7
2025-03-08qemu/atomic: Rename atomic128-ldst.h headers using .h.inc suffixPhilippe Mathieu-Daudé5-2/+2
2025-03-08qemu/atomic: Rename atomic128-cas.h headers using .h.inc suffixPhilippe Mathieu-Daudé2-1/+1
2025-01-16util/cpuinfo-riscv: Detect ZbsRichard Henderson1-2/+3
2024-10-31target/i386/hvf: fix handling of XSAVE-related CPUID bitsPaolo Bonzini1-0/+1
2024-10-22util: Add RISC-V vector extension probe in cpuinfoTANG Tiancheng1-0/+2
2024-07-03util/cpuinfo-riscv: Support host/cpuinfo.h for riscvRichard Henderson1-0/+23
2024-06-28Revert "host/i386: assume presence of SSE2"Paolo Bonzini2-2/+4
2024-06-28Revert "host/i386: assume presence of POPCNT"Paolo Bonzini1-0/+1
2024-06-19util/bufferiszero: Add loongarch64 vector accelerationRichard Henderson1-0/+143
2024-06-19util/bufferiszero: Split out host include filesRichard Henderson4-0/+211
2024-06-19util/loongarch64: Detect LASX vector supportRichard Henderson1-0/+1
2024-06-05host/i386: assume presence of POPCNTPaolo Bonzini1-1/+0
2024-06-05host/i386: assume presence of SSE2Paolo Bonzini1-1/+0
2024-06-05host/i386: assume presence of CMOVPaolo Bonzini1-1/+0
2024-06-05host/i386: nothing looks at CPUINFO_SSE4Paolo Bonzini1-1/+0
2024-04-26accel/tcg: Rename load-extract/store-insert headers using .h.inc suffixPhilippe Mathieu-Daudé7-0/+0
2023-11-13host/include/generic/host/atomic128: Fix compilation problem with Clang 17Thomas Huth2-2/+2
2023-11-06host/include/loongarch64: Add atomic16 load and storeRichard Henderson3-0/+103
2023-11-06util: Add cpuinfo for loongarch64Richard Henderson1-0/+21
2023-09-20i386: spelling fixesMichael Tokarev1-1/+1
2023-09-20ppc: spelling fixesMichael Tokarev1-1/+1
2023-09-19Merge tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi1-0/+1
2023-09-16util/cpuinfo-aarch64: Add CPUINFO_BTIRichard Henderson1-0/+1
2023-09-15host/include/aarch64: Implement clmul.hRichard Henderson2-0/+42
2023-09-15host/include/i386: Implement clmul.hRichard Henderson3-0/+31
2023-09-15crypto: Add generic 64-bit carry-less multiply routineRichard Henderson1-0/+15
2023-07-25other architectures: spelling fixesMichael Tokarev1-1/+1
2023-07-25arm: spelling fixesMichael Tokarev1-1/+1
2023-07-08host/include/ppc: Implement aes-round.hRichard Henderson3-0/+184
2023-07-08host/include/aarch64: Implement aes-round.hRichard Henderson2-0/+206
2023-07-08host/include/i386: Implement aes-round.hRichard Henderson3-0/+154
2023-07-08crypto: Add aesdec_ISB_ISR_AK_IMCRichard Henderson1-0/+3
2023-07-08crypto: Add aesdec_ISB_ISR_IMC_AKRichard Henderson1-0/+3
2023-07-08crypto: Add aesenc_SB_SR_MC_AKRichard Henderson1-0/+3
2023-07-08crypto: Add aesdec_IMCRichard Henderson1-0/+2
2023-07-08crypto: Add aesenc_MCRichard Henderson1-0/+2
2023-07-08crypto: Add aesdec_ISB_ISR_AKRichard Henderson1-0/+4
2023-07-08crypto: Add aesenc_SB_SR_AKRichard Henderson1-0/+16
2023-07-08util: Add cpuinfo-ppc.cRichard Henderson2-0/+30
2023-06-20host/include/x86_64: Use __m128i for "x" constraintsRichard Henderson2-13/+20
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